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105 lines
3.0 KiB
105 lines
3.0 KiB
8 years ago
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/**
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* TensorEvaluate.h
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*
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* Author: hedaoyuan (hedaoyuan@baidu.com)
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* Created on: 2016-06-06
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*
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* Copyright (c) Baidu.com, Inc. All Rights Reserved
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*
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*/
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#pragma once
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#include <algorithm>
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#include "paddle/utils/Logging.h"
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#include "hl_base.h"
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namespace paddle {
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/**
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* \brief The tensor cpu evaluate api.
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*/
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template<class T, typename LeftType, typename RightType>
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inline void TensorCpuApply(LeftType& lhs, const RightType& rhs) {
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TensorApply<LeftType, T> lhs_(lhs);
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TensorApply<const RightType, T> rhs_(rhs);
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CHECK_EQ(lhs_.getWidth(), rhs_.getWidth());
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CHECK_EQ(lhs_.getHeight(), rhs_.getHeight());
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CHECK_EQ(lhs_.useGpu(), rhs_.useGpu());
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if (lhs_.isContiguous() && rhs_.isContiguous()) {
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int size = lhs_.getHeight() * lhs_.getWidth();
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for (int index = 0; index < size; index++) {
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lhs_.applyRef(index) = rhs_.apply(index);
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}
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} else {
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for (size_t i = 0; i < lhs_.getHeight(); i++) {
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for (size_t j = 0; j < lhs_.getWidth(); j++) {
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lhs_.applyRef(i, j) = rhs_.apply(i, j);
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}
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}
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}
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}
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#ifdef __NVCC__
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template<typename LeftType, typename RightType>
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__global__
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void TensorElementWiseOp(LeftType lhs, RightType rhs, const int border) {
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const int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < border) {
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lhs.applyRef(idx) = rhs.apply(idx);
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}
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}
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template<typename LeftType, typename RightType>
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__global__ void TensorElementWiseOp(LeftType lhs, RightType rhs) {
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const int colIdx = blockIdx.x * blockDim.x + threadIdx.x;
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const int rowIdx = blockIdx.y * blockDim.y + threadIdx.y;
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for (int i = rowIdx; i < lhs.getHeight(); i += gridDim.y * blockDim.y) {
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for (int j = colIdx; j < lhs.getWidth(); j += gridDim.x * blockDim.x) {
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lhs.applyRef(i, j) = rhs.apply(i, j);
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}
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}
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}
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/**
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* \brief The tensor gpu evaluate api.
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*/
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template<class T, typename LeftType, typename RightType>
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inline void TensorGpuApply(LeftType& lhs, const RightType& rhs) {
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TensorApply<LeftType, T> lhs_(lhs);
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TensorApply<const RightType, T> rhs_(rhs);
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CHECK_EQ(lhs_.getWidth(), rhs_.getWidth());
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CHECK_EQ(lhs_.getHeight(), rhs_.getHeight());
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CHECK_EQ(lhs_.useGpu(), rhs_.useGpu());
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int dimM = lhs_.getHeight();
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int dimN = lhs_.getWidth();
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if (lhs_.isContiguous() && rhs_.isContiguous()) {
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int size = dimM * dimN;
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int blockSize = size <= 1024 ? size : 1024;
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int gridSize = (size + 1024 - 1) / 1024;
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TensorElementWiseOp
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<<<gridSize, blockSize, 0, STREAM_DEFAULT>>>(lhs_, rhs_, size);
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} else {
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int blockSizeY = std::min(32, dimM);
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int blockSizeX = (32 / blockSizeY) * 32;
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int gridSizeX = std::min(32, (dimN + blockSizeX - 1) / blockSizeX);
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int gridSizeY = std::min(32, (dimM + blockSizeY - 1) / blockSizeY);
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dim3 threads(blockSizeX, blockSizeY);
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dim3 grid(gridSizeX, gridSizeY);
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TensorElementWiseOp
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<<<grid, threads, 0, STREAM_DEFAULT>>>(lhs_, rhs_);
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}
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CHECK_SYNC("TensorGpuApply failed");
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}
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#else
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template<class T, typename LeftType, typename RightType>
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inline void TensorGpuApply(LeftType& lhs, RightType& rhs) {
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}
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#endif
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} // namespace paddle
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