Merge pull request #4483 from zchen0211/develop
gather, scatter with gpu support, passed python testtonyyang-svail-feed-op-desgin
Zhuoyuan
8 years ago
committed by
GitHub
commit
2817ca0347
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/* Copyright (c) 2016 PaddlePaddle Authors All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#pragma once
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#include "paddle/framework/tensor.h"
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#include "paddle/platform/place.h"
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namespace paddle {
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namespace operators {
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using framework::Tensor;
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using platform::Place;
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#define CUDA_1D_KERNEL_LOOP(i, n) \
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for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < (n); \
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i += blockDim.x * gridDim.x)
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template <typename T>
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__global__ void GatherCUDAKernel(const T* params, const int* indices, T* output,
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size_t index_size, size_t slice_size) {
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CUDA_1D_KERNEL_LOOP(i, index_size * slice_size) {
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int indices_i = i / slice_size;
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int slice_i = i - indices_i * slice_size; // offset inside the slice
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int gather_i = indices[indices_i];
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int params_i = gather_i * slice_size + slice_i;
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*(output + i) = *(params + params_i);
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}
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}
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/**
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* A thin wrapper on gpu tensor
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* Return a new tensor from source tensor, gathered according to index
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* input[src]: type-T source Tensor
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* input[index]: type-int index Tensor (1-D)
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* return: output tensor
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*/
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template <typename T>
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void GPUGather(const platform::DeviceContext& ctx, const Tensor& src,
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const Tensor& index, Tensor* output) {
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// PADDLE_ENFORCE(platform::is_gpu_place(place));
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// check index of shape 1-D
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PADDLE_ENFORCE(index.dims().size() == 1);
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int index_size = index.dims()[0];
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auto src_dims = src.dims();
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framework::DDim output_dims(src_dims);
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output_dims[0] = index_size;
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// slice size
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int slice_size = 1;
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for (int i = 1; i < src_dims.size(); ++i) slice_size *= src_dims[i];
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const T* p_src = src.data<T>();
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const int* p_index = index.data<int>();
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T* p_output = output->data<T>();
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int block = 512;
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int n = slice_size * index_size;
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int grid = (n + block - 1) / block;
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GatherCUDAKernel<T><<<
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grid, block, 0,
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reinterpret_cast<const platform::CUDADeviceContext&>(ctx).stream()>>>(
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p_src, p_index, p_output, index_size, slice_size);
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}
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} // namespace operators
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} // namespace paddle
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/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "gather.cu.h"
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#include "paddle/framework/eigen.h"
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#include "paddle/operators/gather_op.h"
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#include "scatter.cu.h"
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namespace paddle {
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namespace operators {
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template <typename T>
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class GatherOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"This kernel only runs on GPU device.");
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auto *x = ctx.Input<Tensor>("X");
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auto *index = ctx.Input<Tensor>("Index");
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auto *output = ctx.Output<Tensor>("Out");
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output->mutable_data<T>(ctx.GetPlace());
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GPUGather<T>(ctx.device_context(), *x, *index, output);
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}
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};
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template <typename T>
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class GatherGradOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"This kernel only runs on GPU device.");
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auto *Index = ctx.Input<Tensor>("Index");
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auto *dX = ctx.Output<Tensor>(framework::GradVarName("X"));
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auto *dO = ctx.Input<Tensor>(framework::GradVarName("Out"));
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auto *x = ctx.Input<Tensor>("X");
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dX->mutable_data<T>(ctx.GetPlace());
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auto dxt = framework::EigenVector<T>::Flatten(*dX);
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auto place = ctx.GetEigenDevice<platform::GPUPlace>();
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dxt.device(place) = dxt.constant(static_cast<T>(0));
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GPUScatterAssign<T>(ctx.device_context(), *dO, *Index, dX);
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP_GPU_KERNEL(gather, ops::GatherOpCUDAKernel<float>);
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REGISTER_OP_GPU_KERNEL(gather_grad, ops::GatherGradOpCUDAKernel<float>);
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/* Copyright (c) 2016 PaddlePaddle Authors All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#pragma once
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#include "paddle/framework/tensor.h"
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#include "paddle/platform/place.h"
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namespace paddle {
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namespace operators {
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using Tensor = framework::Tensor;
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#define CUDA_1D_KERNEL_LOOP(i, n) \
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for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < (n); \
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i += blockDim.x * gridDim.x)
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template <typename T>
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__global__ void ScatterCUDAKernel(const T* params, const int* indices,
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T* output, size_t index_size,
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size_t slice_size) {
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CUDA_1D_KERNEL_LOOP(i, index_size * slice_size) {
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int indices_i = i / slice_size;
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int slice_i = i - indices_i * slice_size; // offset inside the slice
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int scatter_i = indices[indices_i];
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int out_i = scatter_i * slice_size + slice_i;
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*(output + out_i) = *(params + i);
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}
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}
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/**
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* A thin wrapper on gpu tensor
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* Return a new updated tensor from source tensor, scatter-assigned according to
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* index
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* input[src]: type-T source Tensor
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* input[index]: type-int index Tensor (1-D)
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* return: output tensor
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*/
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template <typename T>
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void GPUScatterAssign(const platform::DeviceContext& ctx, const Tensor& src,
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const Tensor& index, Tensor* output) {
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// PADDLE_ENFORCE(platform::is_gpu_place(place));
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// check index of shape 1-D
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PADDLE_ENFORCE(index.dims().size() == 1);
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int index_size = index.dims()[0];
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auto src_dims = src.dims();
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framework::DDim output_dims(src_dims);
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output_dims[0] = index_size;
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// slice size
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int slice_size = 1;
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for (int i = 1; i < src_dims.size(); ++i) slice_size *= src_dims[i];
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const T* p_src = src.data<T>();
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const int* p_index = index.data<int>();
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T* p_output = output->data<T>();
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int block = 512;
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int n = slice_size * index_size;
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int grid = (n + block - 1) / block;
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ScatterCUDAKernel<T><<<
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grid, block, 0,
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reinterpret_cast<const platform::CUDADeviceContext&>(ctx).stream()>>>(
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p_src, p_index, p_output, index_size, slice_size);
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}
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} // namespace operators
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} // namespace paddle
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@ -0,0 +1,63 @@
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/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "gather.cu.h"
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#include "paddle/operators/gather_op.h"
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#include "scatter.cu.h"
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namespace paddle {
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namespace operators {
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template <typename T>
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class ScatterOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"This kernel only runs on GPU device.");
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auto *Ref = ctx.Input<Tensor>("Ref");
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auto *Index = ctx.Input<Tensor>("Index");
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auto *Updates = ctx.Input<Tensor>("Updates");
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auto *Out = ctx.Output<Tensor>("Out");
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Out->ShareDataWith<T>(*Ref);
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GPUScatterAssign<T>(ctx.device_context(), *Updates, *Index, Out);
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}
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};
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template <typename T>
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class ScatterGradOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"This kernel only runs on GPU device.");
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auto *dRef = ctx.Output<Tensor>(framework::GradVarName("Ref"));
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auto *dUpdates = ctx.Output<Tensor>(framework::GradVarName("Updates"));
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auto *Index = ctx.Input<Tensor>("Index");
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auto *dOut = ctx.Input<Tensor>(framework::GradVarName("Out"));
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// In place gradient: dRef = dO
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dRef->ShareDataWith<T>(*dOut);
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dUpdates->mutable_data<T>(ctx.GetPlace());
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// Gradient by Gather: dUpdates = dO[Index]
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GPUGather<T>(ctx.device_context(), *dOut, *Index, dUpdates);
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP_GPU_KERNEL(scatter, ops::ScatterOpCUDAKernel<float>);
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REGISTER_OP_GPU_KERNEL(scatter_grad, ops::ScatterGradOpCUDAKernel<float>);
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