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/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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    http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include <algorithm>
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/operators/detection/box_clip_op.h"
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#include "paddle/fluid/operators/math/math_function.h"
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#include "paddle/fluid/platform/cuda_primitives.h"
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#include "paddle/fluid/platform/hostdevice.h"
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namespace paddle {
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namespace operators {
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using Tensor = framework::Tensor;
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using LoDTenso = framework::LoDTensor;
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static constexpr int ImInfoSize = 3;
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template <typename T, int BlockSize>
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static __global__ void GPUBoxClip(const T *input, const size_t *lod,
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                                  const size_t width, const T *im_info,
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                                  T *output) {
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  for (int i = threadIdx.x; i < (lod[blockIdx.x + 1] - lod[blockIdx.x]) * width;
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       i += BlockSize) {
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    int idx = lod[blockIdx.x] * width + i;
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    T im_w = round(im_info[blockIdx.x * ImInfoSize + 1] /
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                   im_info[blockIdx.x * ImInfoSize + 2]);
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    T im_h = round(im_info[blockIdx.x * ImInfoSize] /
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                   im_info[blockIdx.x * ImInfoSize + 2]);
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    T im_size = (idx % 2 == 0) ? im_w : im_h;
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    output[idx] = max(min(input[idx], im_size - 1), T(0.));
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  }
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}
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template <typename DeviceContext, typename T>
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class GPUBoxClipKernel : public framework::OpKernel<T> {
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 public:
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  void Compute(const framework::ExecutionContext &context) const override {
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    PADDLE_ENFORCE(platform::is_gpu_place(context.GetPlace()),
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                   "This kernel only runs on GPU device.");
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    auto *input = context.Input<LoDTensor>("Input");
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    auto *im_info = context.Input<Tensor>("ImInfo");
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    auto *output = context.Output<LoDTensor>("Output");
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    const int64_t num = input->dims()[0];
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    const int64_t bbox_width = input->numel() / num;
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    auto lod = input->lod();
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    framework::LoD abs_offset_lod = framework::ToAbsOffset(lod);
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    auto &dev_ctx = context.template device_context<DeviceContext>();
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    auto stream = dev_ctx.stream();
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    const size_t num_lod = lod.back().size() - 1;
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    T *output_data = output->mutable_data<T>(dev_ctx.GetPlace());
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    GPUBoxClip<T, 512><<<num_lod, 512, 0, stream>>>(
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        input->data<T>(), abs_offset_lod[0].CUDAMutableData(dev_ctx.GetPlace()),
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        bbox_width, im_info->data<T>(), output_data);
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  }
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};
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}  // namespace operators
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}  // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP_CUDA_KERNEL(
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    box_clip, ops::GPUBoxClipKernel<paddle::platform::CUDADeviceContext, float>,
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    ops::GPUBoxClipKernel<paddle::platform::CUDADeviceContext, double>);
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