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/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/operators/gemm_conv_op.h"
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namespace paddle {
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namespace operators {
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int outputSize(int input_size, int filter_size, int padding, int stride) {
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int output_size = (input_size - filter_size + 2 * padding) / stride + 1;
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return output_size;
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}
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class Conv2DOp : public framework::OperatorWithKernel {
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public:
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using framework::OperatorWithKernel::OperatorWithKernel;
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protected:
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void InferShape(const framework::InferShapeContext &ctx) const override {
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auto *in = ctx.Input<framework::Tensor>("Input");
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auto *filter = ctx.Input<framework::Tensor>("Filter");
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auto *out = ctx.Output<framework::Tensor>("Output");
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PADDLE_ENFORCE_EQ(in->dims().size(), 4, "Conv2DOp intput should be 4-D.");
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PADDLE_ENFORCE_EQ(filter->dims().size(), 4,
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"Conv2DOp filter should be 4-D.");
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std::vector<int> strides = Attr<std::vector<int>>("strides");
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std::vector<int> paddings = Attr<std::vector<int>>("paddings");
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auto output_height =
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outputSize(in->dims()[2], filter->dims()[2], paddings[0], strides[0]);
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auto output_width =
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outputSize(in->dims()[3], filter->dims()[3], paddings[1], strides[1]);
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out->Resize(
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{in->dims()[0], filter->dims()[0], output_height, output_width});
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}
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};
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class Conv2DOppMaker : public framework::OpProtoAndCheckerMaker {
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public:
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Conv2DOppMaker(framework::OpProto *proto,
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framework::OpAttrChecker *op_checker)
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: OpProtoAndCheckerMaker(proto, op_checker) {
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AddInput(
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"Input",
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"The input tensor of convolution operator. "
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"The format of input tensor is NCHW. Where N is batch size, C is the "
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"number of channels, H and W is the height and width of image.");
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AddInput(
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"Filter",
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"The filter tensor of convolution operator."
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"The format of the filter tensor is MCHW, where M is the number of "
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"output "
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"image channels, C is the number of input image channels, H and W is "
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" height and width of filter.");
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AddOutput("Output",
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"The output tensor of convolution operator."
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"The format of output tensor is also NCHW.");
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AddComment(R"DOC(
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The convolution operation calculates the output based on
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the input, filter and strides, paddings parameters.
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)DOC");
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AddAttr<std::vector<int>>("strides", "strides of convolution operator.");
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AddAttr<std::vector<int>>("paddings", "paddings of convolution operator.");
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}
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};
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class Conv2DOpGrad : public framework::OperatorWithKernel {
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public:
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using framework::OperatorWithKernel::OperatorWithKernel;
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protected:
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void InferShape(const framework::InferShapeContext &ctx) const override {}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP(conv2d, ops::Conv2DOp, ops::Conv2DOppMaker, conv2d_grad,
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ops::Conv2DOpGrad);
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REGISTER_OP_CPU_KERNEL(conv2d,
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ops::GemmConvKernel<paddle::platform::CPUPlace, float>);
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REGISTER_OP_CPU_KERNEL(
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conv2d_grad, ops::GemmConvGradKernel<paddle::platform::CPUPlace, float>);
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/* Copyright (c) 2016 PaddlePaddle Authors All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/operators/gemm_conv_op.h"
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namespace ops = paddle::operators;
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REGISTER_OP_GPU_KERNEL(conv2d,
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ops::GemmConvKernel<paddle::platform::GPUPlace, float>);
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REGISTER_OP_GPU_KERNEL(
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conv2d_grad, ops::GemmConvGradKernel<paddle::platform::GPUPlace, float>);
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@ -0,0 +1,103 @@
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/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#pragma once
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#include "paddle/framework/op_registry.h"
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#include "paddle/operators/math/im2col.h"
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#include "paddle/operators/math/math_function.h"
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namespace paddle {
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namespace operators {
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using Tensor = framework::Tensor;
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template <typename Place, typename T>
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class GemmConvKernel : public framework::OpKernel {
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public:
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void Compute(const framework::ExecutionContext& context) const override {
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const Tensor* input = context.Input<Tensor>("Input");
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Tensor* filter = const_cast<Tensor*>(context.Input<Tensor>("Filter"));
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Tensor* output = context.Output<Tensor>("Output");
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output->mutable_data<T>(context.GetPlace());
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paddle::framework::Tensor col;
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paddle::framework::Tensor in_slice;
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paddle::framework::Tensor out_slice;
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std::vector<int> strides = context.Attr<std::vector<int>>("strides");
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std::vector<int> paddings = context.Attr<std::vector<int>>("paddings");
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int batch_size = input->dims()[0];
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int input_channels = input->dims()[1];
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int filter_height = filter->dims()[filter->dims().size() - 2];
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int filter_width = filter->dims()[filter->dims().size() - 1];
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int output_height = output->dims()[2];
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int output_width = output->dims()[3];
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paddle::operators::math::Im2ColFunctor<
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paddle::operators::math::ColFormat::kCFO, Place, T>
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im2col;
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framework::DDim col_shape = {input_channels, filter_height, filter_width,
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output_height, output_width};
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col.mutable_data<float>(col_shape, context.GetPlace());
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auto* device_context =
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const_cast<platform::DeviceContext*>(context.device_context_);
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framework::DDim input_shape = {input->dims()[1], input->dims()[2],
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input->dims()[3]};
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framework::DDim filter_matrix_shape = {
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filter->dims()[0],
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filter->dims()[1] * filter->dims()[2] * filter->dims()[3]};
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framework::DDim col_matrix_shape = {
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input_channels * filter_height * filter_width,
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output_height * output_width};
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framework::DDim output_matrix_shape = {
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output->dims()[1], output->dims()[2] * output->dims()[3]};
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filter->Resize(filter_matrix_shape);
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// convolution opperator: im2col + gemm
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for (int i = 0; i < batch_size; i++) {
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// im2col
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in_slice = input->Slice<T>(i, i + 1);
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in_slice.Resize(input_shape);
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col.Resize(col_shape);
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im2col(in_slice, col, strides[0], strides[1], paddings[0], paddings[1],
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device_context);
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// gemm
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out_slice = output->Slice<T>(i, i + 1);
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out_slice.Resize(output_matrix_shape);
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col.Resize(col_matrix_shape);
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math::matmul<Place, T>(*filter, false, col, false, T(1.0), &out_slice,
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T(0.0), device_context);
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}
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}
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};
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template <typename Place, typename T>
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class GemmConvGradKernel : public framework::OpKernel {
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public:
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void Compute(const framework::ExecutionContext& context) const override {
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#if 0
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auto input = context.Input<Tensor>("Input");
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auto filter = context.Input<Tensor>("Filter");
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auto output = context.Output<Tensor>("Output");
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output->mutable_data<T>(context.GetPlace());
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#endif
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}
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};
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} // namespace operators
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} // namespace paddle
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import unittest
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import numpy as np
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from gradient_checker import GradientChecker, create_op
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from op_test_util import OpTestMeta
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class TestConv2dOp(unittest.TestCase):
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__metaclass__ = OpTestMeta
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def setUp(self):
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self.type = "conv2d"
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batch_size = 2
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input_channels = 3
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input_height = 5
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input_width = 5
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output_channels = 6
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filter_height = 3
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filter_width = 3
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stride = 1
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padding = 0
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output_height = (input_height - filter_height + 2 * padding
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) / stride + 1
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output_width = (input_width - filter_width + 2 * padding) / stride + 1
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input = np.random.random((batch_size, input_channels, input_height,
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input_width)).astype("float32")
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filter = np.random.random(
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(output_channels, input_channels, filter_height,
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filter_width)).astype("float32")
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output = np.ndarray(
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(batch_size, output_channels, output_height, output_width))
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for batchid in xrange(batch_size):
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for channelid in xrange(output_channels):
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for rowid in xrange(output_height):
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for colid in xrange(output_width):
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start_h = (rowid * stride) - padding
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start_w = (colid * stride) - padding
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output_value = 0.0
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for inchannelid in xrange(input_channels):
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for frowid in xrange(filter_height):
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for fcolid in xrange(filter_width):
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input_value = 0.0
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inrowid = start_h + frowid
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incolid = start_w + fcolid
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if ((inrowid >= 0 and
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inrowid < input_height) and
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(incolid >= 0 and
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incolid < input_width)):
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input_value = input[batchid][
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inchannelid][inrowid][incolid]
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filter_value = filter[channelid][
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inchannelid][frowid][fcolid]
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output_value += input_value * filter_value
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output[batchid][channelid][rowid][colid] = output_value
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self.inputs = {'Input': input, 'Filter': filter}
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self.outputs = {'Output': output}
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self.attrs = {'strides': [1, 1], 'paddings': [0, 0]}
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if __name__ == '__main__':
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unittest.main()
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