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113 lines
4.3 KiB
113 lines
4.3 KiB
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/platform/cudnn_helper.h"
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namespace paddle {
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namespace operators {
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using Tensor = framework::Tensor;
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using ScopedSpatialTransformerDescriptor =
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platform::ScopedSpatialTransformerDescriptor;
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template <typename T>
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class CUDNNAffineGridOpKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext& ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"It must use CUDAPlace.");
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auto& dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
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auto handle = dev_ctx.cudnn_handle();
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auto* theta = ctx.Input<Tensor>("Theta");
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auto* output = ctx.Output<Tensor>("Output");
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const T* theta_data = theta->data<T>();
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int n = theta->dims()[0];
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auto size_attr = ctx.Attr<std::vector<int>>("output_shape");
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Tensor h_sizes;
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int* h_size_data;
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if (size_attr.size() == 0) {
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auto* output_shape = ctx.Input<Tensor>("OutputShape");
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framework::TensorCopy(*output_shape, platform::CPUPlace(), &h_sizes);
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h_size_data = h_sizes.data<int>();
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} else {
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h_size_data = h_sizes.mutable_data<int>({4}, platform::CPUPlace());
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h_size_data[0] = n;
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h_size_data[1] = size_attr[1];
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h_size_data[2] = size_attr[2];
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h_size_data[3] = size_attr[3];
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}
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T* output_data = output->mutable_data<T>(
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{n, h_size_data[2], h_size_data[3], 2}, ctx.GetPlace());
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ScopedSpatialTransformerDescriptor st_desc;
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cudnnSpatialTransformerDescriptor_t cudnn_st_desc =
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st_desc.descriptor<T>(4, h_size_data);
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PADDLE_ENFORCE(platform::dynload::cudnnSpatialTfGridGeneratorForward(
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handle, cudnn_st_desc, theta_data, output_data));
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}
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};
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template <typename T>
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class CUDNNAffineGridGradOpKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext& ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"It must use CUDAPlace.");
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auto& dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
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auto handle = dev_ctx.cudnn_handle();
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auto output_grad = ctx.Input<Tensor>(framework::GradVarName("Output"));
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auto theta_grad = ctx.Output<Tensor>(framework::GradVarName("Theta"));
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int n = output_grad->dims()[0];
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auto size_attr = ctx.Attr<std::vector<int>>("output_shape");
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Tensor h_sizes;
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int* h_size_data;
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if (size_attr.size() == 0) {
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auto* output_shape = ctx.Input<Tensor>("OutputShape");
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framework::TensorCopy(*output_shape, platform::CPUPlace(), &h_sizes);
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h_size_data = h_sizes.data<int>();
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} else {
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h_size_data = h_sizes.mutable_data<int>({4}, platform::CPUPlace());
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h_size_data[0] = n;
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h_size_data[1] = size_attr[1];
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h_size_data[2] = size_attr[2];
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h_size_data[3] = size_attr[3];
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}
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ScopedSpatialTransformerDescriptor st_desc;
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cudnnSpatialTransformerDescriptor_t cudnn_st_desc =
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st_desc.descriptor<T>(4, h_size_data);
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const T* output_grad_data = output_grad->data<T>();
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T* theta_grad_data = theta_grad->mutable_data<T>(ctx.GetPlace());
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PADDLE_ENFORCE(platform::dynload::cudnnSpatialTfGridGeneratorBackward(
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handle, cudnn_st_desc, output_grad_data, theta_grad_data));
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace plat = paddle::platform;
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REGISTER_OP_KERNEL(affine_grid, CUDNN, plat::CUDAPlace,
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paddle::operators::CUDNNAffineGridOpKernel<float>,
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paddle::operators::CUDNNAffineGridOpKernel<double>);
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REGISTER_OP_KERNEL(affine_grid_grad, CUDNN, plat::CUDAPlace,
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paddle::operators::CUDNNAffineGridGradOpKernel<float>,
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paddle::operators::CUDNNAffineGridGradOpKernel<double>);
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