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532 lines
24 KiB
532 lines
24 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/operators/conv_transpose_op.h"
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#include <memory>
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#include <string>
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#include <vector>
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#include "paddle/fluid/framework/data_layout.h"
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#include "paddle/fluid/platform/cudnn_workspace_helper.h"
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#ifdef PADDLE_WITH_MKLDNN
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#include "paddle/fluid/platform/mkldnn_helper.h"
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#endif
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namespace paddle {
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namespace operators {
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using DataLayout = framework::DataLayout;
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void ConvTransposeOp::InferShape(framework::InferShapeContext* ctx) const {
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OP_INOUT_CHECK(ctx->HasInput("Input"), "Input", "Input", "ConvTranspose");
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OP_INOUT_CHECK(ctx->HasInput("Filter"), "Input", "Filter", "ConvTranspose");
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OP_INOUT_CHECK(ctx->HasOutput("Output"), "Output", "Output", "ConvTranspose");
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auto in_dims = ctx->GetInputDim("Input");
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auto filter_dims = ctx->GetInputDim("Filter");
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std::vector<int> output_size =
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ctx->Attrs().Get<std::vector<int>>("output_size");
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std::vector<int> strides = ctx->Attrs().Get<std::vector<int>>("strides");
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std::vector<int> paddings = ctx->Attrs().Get<std::vector<int>>("paddings");
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std::vector<int> dilations = ctx->Attrs().Get<std::vector<int>>("dilations");
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int groups = ctx->Attrs().Get<int>("groups");
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std::string padding_algorithm =
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ctx->Attrs().Get<std::string>("padding_algorithm");
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const std::string data_layout_str =
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ctx->Attrs().Get<std::string>("data_format");
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const DataLayout data_layout =
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this->IsMKLDNNType() ? DataLayout::kNCHW
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: framework::StringToDataLayout(data_layout_str);
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PADDLE_ENFORCE_EQ(in_dims.size() == 4 || in_dims.size() == 5, true,
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platform::errors::InvalidArgument(
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"Input of Op(conv_transpose) should be 4-D or "
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"5-D Tensor. But received: %u-D Tensor, "
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"the shape of input is [%s]",
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in_dims.size(), in_dims));
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PADDLE_ENFORCE_EQ(
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in_dims.size(), filter_dims.size(),
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platform::errors::InvalidArgument(
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"The input's dimension size and filter's dimension size of "
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"Op (conv_transpose) should be equal. But received: the shape of "
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"input is [%s], the dimension size of input is [%d], the shape "
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"of filter is [%s], the dimension size of filter is [%d]. ",
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in_dims, in_dims.size(), filter_dims, filter_dims.size()));
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int in_sub_stride_size = in_dims.size() - strides.size();
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PADDLE_ENFORCE_EQ(
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in_dims.size() - strides.size(), 2U,
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platform::errors::InvalidArgument(
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"The input's dimension size minus Attr(stride)'s size must "
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"be euqal to 2 for Op(conv_transpose). But received: [%d], the "
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"input's dimension size is [%d], the shape of input "
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"is [%s], the Attr(stride)'s size is [%d].",
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in_sub_stride_size, in_dims.size(), in_dims, strides.size()));
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if (output_size.size())
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PADDLE_ENFORCE_EQ(
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output_size.size(), strides.size(),
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platform::errors::InvalidArgument(
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"The Attr(output_size) and Attr(stride) of Op(conv_transpose) "
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"should be the same."));
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const int64_t C =
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(data_layout != DataLayout::kNHWC ? in_dims[1]
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: in_dims[in_dims.size() - 1]);
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PADDLE_ENFORCE_EQ(
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C, filter_dims[0],
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platform::errors::InvalidArgument(
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"The number of input channels should be equal to filter channels "
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"for Op(conv_transpose). But received: the input's channels is "
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"[%d], the shape of input is [%s], the filter's channels is [%d], "
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"the shape of filter is [%s]. The data_format is %s."
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"The error may come from wrong data_format setting.",
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C, in_dims, filter_dims[0], filter_dims, data_layout_str));
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framework::DDim in_data_dims;
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if (data_layout != DataLayout::kNHWC) {
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in_data_dims = framework::slice_ddim(in_dims, 2, in_dims.size());
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} else {
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in_data_dims = framework::slice_ddim(in_dims, 1, in_dims.size() - 1);
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}
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framework::DDim filter_data_dims =
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framework::slice_ddim(filter_dims, 2, filter_dims.size());
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std::vector<int> ksize = framework::vectorize<int>(filter_data_dims);
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UpdatePaddingAndDilation(&paddings, &dilations, padding_algorithm,
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in_data_dims, strides, ksize);
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std::vector<int64_t> output_shape({in_dims[0]});
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if (data_layout != DataLayout::kNHWC) {
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output_shape.push_back(filter_dims[1] * groups);
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}
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const int offset = (data_layout != DataLayout::kNHWC ? 2 : 1);
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for (size_t i = 0; i < strides.size(); ++i) {
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auto filter_extent = dilations[i] * (filter_dims[i + 2] - 1) + 1;
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auto infer_shape = (ctx->IsRuntime() || in_dims[i + offset] > 0)
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? (in_dims[i + offset] - 1) * strides[i] -
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paddings[2 * i] - paddings[2 * i + 1] +
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filter_extent
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: -1;
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if (output_size.size()) {
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if (ctx->IsRuntime()) {
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PADDLE_ENFORCE_GE(
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output_size[i], infer_shape,
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platform::errors::InvalidArgument(
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"output_size of Op(ConvTransposeOp) should not be "
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"less than the infered output size. But received output_size = "
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"[%s], whose dim %d is less than the infered output size [%s]",
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framework::make_ddim(output_size), i, infer_shape));
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PADDLE_ENFORCE_LT(
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output_size[i], infer_shape + strides[i],
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platform::errors::InvalidArgument(
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"output_size of Op(ConvTransposeOp) should be less "
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"than infered size + stride. But received output_size = [%s], "
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"whose dim %d is not less than the infered output size (%d) + "
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"stride (%d) = %d",
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framework::make_ddim(output_size), i, infer_shape, strides[i],
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infer_shape + strides[i]));
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}
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output_shape.push_back(output_size[i]);
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} else {
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output_shape.push_back(infer_shape);
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}
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}
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if (data_layout == DataLayout::kNHWC) {
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output_shape.push_back(filter_dims[1] * groups);
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}
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ctx->SetOutputDim("Output", framework::make_ddim(output_shape));
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}
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framework::OpKernelType ConvTransposeOp::GetExpectedKernelType(
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const framework::ExecutionContext& ctx) const {
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framework::LibraryType library_{framework::LibraryType::kPlain};
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framework::DataLayout layout_ = framework::DataLayout::kAnyLayout;
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bool use_cudnn = ctx.Attr<bool>("use_cudnn");
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use_cudnn &= platform::is_gpu_place(ctx.GetPlace());
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#ifdef PADDLE_WITH_CUDA
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if (platform::is_gpu_place(ctx.GetPlace())) {
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auto& dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
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use_cudnn &= dev_ctx.cudnn_handle() != nullptr;
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if (use_cudnn) {
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library_ = framework::LibraryType::kCUDNN;
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}
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}
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#endif
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#ifdef PADDLE_WITH_MKLDNN
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if (library_ == framework::LibraryType::kPlain &&
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platform::CanMKLDNNBeUsed(ctx)) {
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library_ = framework::LibraryType::kMKLDNN;
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layout_ = framework::DataLayout::kMKLDNN;
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}
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#endif
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return framework::OpKernelType(
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OperatorWithKernel::IndicateVarDataType(ctx, "Input"), ctx.GetPlace(),
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layout_, library_);
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}
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framework::OpKernelType ConvTransposeOp::GetKernelTypeForVar(
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const std::string& var_name, const Tensor& tensor,
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const framework::OpKernelType& expected_kernel_type) const {
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#ifdef PADDLE_WITH_MKLDNN
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// Only input require reshaping, weights and
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// bias are having shape in NCHW order
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if ((var_name == "Input") &&
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(expected_kernel_type.data_layout_ == framework::DataLayout::kMKLDNN) &&
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(tensor.layout() != framework::DataLayout::kMKLDNN)) {
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auto attrs = Attrs();
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auto ar = paddle::framework::AttrReader(attrs);
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const std::string data_format = ar.Get<std::string>("data_format");
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auto dl = framework::StringToDataLayout(data_format);
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// Some models may have intentionally set "AnyLayout" for pool
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// op. Treat this as NCHW (default data_format value)
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if (dl != framework::DataLayout::kAnyLayout) {
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return framework::OpKernelType(
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expected_kernel_type.data_type_, tensor.place(),
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framework::StringToDataLayout(data_format));
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}
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}
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#endif
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return framework::OpKernelType(expected_kernel_type.data_type_,
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tensor.place(), tensor.layout());
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}
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void Conv2DTransposeOpMaker::Make() {
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AddAttr<bool>("is_test",
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"(bool, default false) Set to true for inference only, false "
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"for training. Some layers may run faster when this is true.")
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.SetDefault(false);
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AddInput("Input",
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"(Tensor) The input tensor of convolution transpose operator. "
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"The format of input tensor is NCHW or NHWC. Where N is batch size, "
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"C is the number of input channels, H is the height of the feature, "
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"and W is the width of the feature.");
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AddInput(
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"Filter",
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"(Tensor) The filter tensor of convolution transpose operator. "
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"The format of the filter tensor is MCHW, where M is the number of "
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"input feature channels, C is the number of "
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"output feature channels,"
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"H is the height of the filter, and W is the width of the filter. "
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"We enforce groups number == 1 in the convolution transpose scenario.");
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AddInput("Bias",
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"(Tensor) Bias to be added to each output of filter application."
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"The format of output tensor is X (one-dimensional) of size equal"
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"to the number of output channels. Only used with MKL-DNN.")
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.AsDispensable();
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AddOutput("Output",
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"(Tensor) The output tensor of convolution transpose operator. "
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"The format of output tensor is the same as input tensor.");
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AddAttr<std::vector<int>>("output_size",
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"(vector<int> default: []), the "
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"size of the output tensor")
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.SetDefault({});
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AddAttr<int>("groups",
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"(int default:1), the groups number of the convolution "
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"transpose operator. ")
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.SetDefault(1);
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AddAttr<std::vector<int>>("dilations",
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"(vector<int> default:{1, 1}), the "
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"dilations(h_dilation, w_dilation) of convolution "
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"transpose operator.")
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.SetDefault({1, 1});
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AddAttr<std::vector<int>>(
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"strides",
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"(vector<int> default:{1, 1}), the strides(h_stride, w_stride) of "
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"convolution transpose operator.")
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.SetDefault({1, 1});
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AddAttr<std::vector<int>>(
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"paddings",
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"(vector<int> default:{0, 0}), the paddings(h_pad, w_pad) of convolution "
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"transpose operator.")
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.SetDefault({0, 0});
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AddAttr<bool>(
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"use_cudnn",
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"(bool, default false) Only used in cudnn kernel, need install cudnn")
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.SetDefault(false);
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AddAttr<bool>("use_mkldnn",
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"(bool, default false) Only used in mkldnn kernel")
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.SetDefault(false);
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AddAttr<bool>("fuse_relu", "(bool, default false) Only used in mkldnn kernel")
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.SetDefault(false);
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AddAttr<std::string>("fuse_activation",
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"(string, default \"\") Only used in mkldnn kernel")
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.SetDefault("");
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AddAttr<float>("fuse_alpha",
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"(float, default 0.0) Only used in mkldnn kernel")
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.SetDefault(0.0f);
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AddAttr<float>("fuse_beta", "(float, default 0.0) Only used in mkldnn kernel")
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.SetDefault(0.0f);
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AddAttr<std::string>(
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"data_format",
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"(string, default NCHW) Only used in "
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"An optional string from: \"NHWC\", \"NCHW\". "
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"Specify that the data format of the input and output data is "
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"channel_first or channel_last.")
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.SetDefault("NCHW");
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AddAttr<std::string>(
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"padding_algorithm",
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"(string, default \"EXPLICIT\") An optional string from: \"EXPLICIT\","
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"\"SAME\",\"VALID\". Set to \"EXPLICIT\" for explicit padding. "
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"Set to \"SAME\" or \"VALID\" for algorithm of padding. ")
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.SetDefault("EXPLICIT");
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AddAttr<int>("workspace_size_MB",
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"Used in cudnn kernel only. workspace size for cudnn, in MB, "
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"workspace is a section of GPU memory which will be "
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"allocated/freed each time the operator runs, larger "
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"workspace size can increase performance but also requires "
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"better hardward. This size should be carefully set.")
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.SetDefault(platform::GetDefaultConvWorkspaceSizeLimitMB());
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AddComment(R"DOC(
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Convolution2D Transpose Operator.
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The convolution transpose operation calculates the output based on the input, filter
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and dilations, strides, paddings, groups parameters. The size of each dimension of the
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parameters is checked in the infer-shape.
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Input(Input) and output(Output) are in NCHW or NHWC format. Where N is batchsize, C is the
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number of channels, H is the height of the feature, and W is the width of the feature.
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Filter(Input) is in MCHW format. Where M is the number of input feature channels,
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C is the number of output feature channels, H is the height of the filter,
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and W is the width of the filter.
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Parameters(strides, paddings) are two elements. These two elements represent height
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and width, respectively.
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The input(X) size and output(Out) size may be different.
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For an example:
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Input:
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Input shape: $(N, C_{in}, H_{in}, W_{in})$
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Filter shape: $(C_{in}, C_{out}, H_f, W_f)$
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Output:
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Output shape: $(N, C_{out}, H_{out}, W_{out})$
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Where
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$$
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H_{out} = (H_{in} - 1) * strides[0] - pad_height_top - pad_height_bottom + dilations[0] * (H_f - 1) + 1 \\
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W_{out} = (W_{in} - 1) * strides[1] - pad_width_left - pad_width_right + dilations[1] * (W_f - 1) + 1
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$$
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)DOC");
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}
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void Conv3DTransposeOpMaker::Make() {
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AddInput(
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"Input",
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"(Tensor) The input tensor of convolution transpose operator."
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"The format of input tensor is NCDHW or NDHWC. Where N is batch "
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"size, C is the number of channels, D is the depth of the feature, "
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"H is the height of the feature, and W is the width of the feature.");
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AddInput("Filter",
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"(Tensor) The filter tensor of convolution transpose operator."
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"The format of the filter tensor is MCDHW, where M is the number of "
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"input feature channels, C is the number of "
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"output feature channels, D "
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"is the depth of the filter, H is the height of the filter, and "
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"W is the width of the filter."
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"We enforce groups number == 1 and padding == 0 in "
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"the convolution3d transpose scenario.");
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AddOutput("Output",
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"(Tensor) The output tensor of convolution transpose operator."
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"The format of output tensor is the same as input tensor."
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"Where N is batch size, C is "
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"the number of channels, D is the depth of the feature, H is the "
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"height of the feature, and W is the width of the feature.");
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AddAttr<std::vector<int>>("output_size",
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"(vector<int> default: []), the "
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"size of the output tensor")
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.SetDefault({});
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AddAttr<std::vector<int>>(
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"dilations",
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"(vector<int> default:{1, 1, 1}), the "
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"dilations(d_dilation,h_dilation, w_dilation) of convolution "
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"transpose operator.")
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.SetDefault({1, 1, 1});
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AddAttr<std::vector<int>>("strides",
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"(vector<int> default:{1, 1, 1}), the "
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"strides{d_stride, h_stride, w_stride} of "
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"convolution transpose operator.")
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.SetDefault({1, 1, 1});
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AddAttr<std::vector<int>>("paddings",
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"(vector<int> default:{0, 0, 0}), paddings(d_pad, "
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"h_pad, w_pad) of convolution transpose operator.")
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.SetDefault({0, 0, 0});
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AddAttr<int>("groups",
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"(int default:1), the groups number of the convolution3d "
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"transpose operator. ")
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.SetDefault(1);
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AddAttr<bool>(
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"use_cudnn",
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"(bool, default false) Only used in cudnn kernel, need install cudnn")
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.SetDefault(false);
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AddAttr<bool>("use_mkldnn",
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"(bool, default false) Only used in mkldnn kernel")
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.SetDefault(false);
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AddAttr<std::string>(
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"data_format",
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"(string, default NCHW) Only used in "
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"An optional string from: \"NHWC\", \"NCHW\". "
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"Specify that the data format of the input and output data is "
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"channel_first or channel_last.")
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.SetDefault("NCHW");
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AddAttr<std::string>(
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"padding_algorithm",
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"(string, default \"EXPLICIT\") An optional string from: \"EXPLICIT\","
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"\"SAME\",\"VALID\". Set to \"EXPLICIT\" for explicit padding. "
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"Set to \"SAME\" or \"VALID\" for algorithm of padding. ")
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.SetDefault("EXPLICIT");
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AddAttr<int>("workspace_size_MB",
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"Used in cudnn kernel only. workspace size for cudnn, in MB, "
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"workspace is a section of GPU memory which will be "
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"allocated/freed each time the operator runs, larger "
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"workspace size can increase performance but also requires "
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"better hardward. This size should be carefully set.")
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.SetDefault(platform::GetDefaultConvWorkspaceSizeLimitMB());
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AddComment(R"DOC(
|
|
Convolution3D Transpose Operator.
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|
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The convolution transpose operation calculates the output based on the input, filter
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and dilations, strides, paddings, groups parameters. The size of each dimension of the
|
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parameters is checked in the infer-shape.
|
|
Input(Input) and output(Output) are in NCDHW or NDHWC format. Where N is batch size, C is the
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number of channels, D is the depth of the feature, H is the height of the feature,
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and W is the width of the feature.
|
|
Filter(Input) is in MCDHW format. Where M is the number of input feature channels,
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C is the number of output feature channels, D is the depth of the filter,H is the
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height of the filter, and W is the width of the filter.
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Parameters(strides, paddings) are three elements. These three elements represent
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depth, height and width, respectively.
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The input(X) size and output(Out) size may be different.
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Example:
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Input:
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Input shape: $(N, C_{in}, D_{in}, H_{in}, W_{in})$
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Filter shape: $(C_{in}, C_{out}, D_f, H_f, W_f)$
|
|
Output:
|
|
Output shape: $(N, C_{out}, D_{out}, H_{out}, W_{out})$
|
|
Where
|
|
$$
|
|
D_{out} = (D_{in} - 1) * strides[0] - pad_depth_front - pad_depth_back + dilations[0] * (D_f - 1) + 1 \\
|
|
H_{out} = (H_{in} - 1) * strides[1] - pad_height_top - pad_height_bottom + dilations[1] * (H_f - 1) + 1 \\
|
|
W_{out} = (W_{in} - 1) * strides[2] - pad_width_left - pad_width_right + dilations[2] * (W_f - 1) + 1
|
|
$$
|
|
)DOC");
|
|
}
|
|
|
|
void ConvTransposeOpGrad::InferShape(framework::InferShapeContext* ctx) const {
|
|
auto in_dims = ctx->GetInputDim("Input");
|
|
auto filter_dims = ctx->GetInputDim("Filter");
|
|
if (ctx->HasOutput(framework::GradVarName("Input"))) {
|
|
ctx->SetOutputDim(framework::GradVarName("Input"), in_dims);
|
|
}
|
|
if (ctx->HasOutput(framework::GradVarName("Filter"))) {
|
|
ctx->SetOutputDim(framework::GradVarName("Filter"), filter_dims);
|
|
}
|
|
}
|
|
|
|
framework::OpKernelType ConvTransposeOpGrad::GetExpectedKernelType(
|
|
const framework::ExecutionContext& ctx) const {
|
|
bool use_cudnn = ctx.Attr<bool>("use_cudnn");
|
|
use_cudnn &= platform::is_gpu_place(ctx.GetPlace());
|
|
#ifdef PADDLE_WITH_CUDA
|
|
if (platform::is_gpu_place(ctx.GetPlace())) {
|
|
auto& dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
|
|
use_cudnn &= dev_ctx.cudnn_handle() != nullptr;
|
|
}
|
|
#endif
|
|
framework::LibraryType library_;
|
|
if (use_cudnn) {
|
|
library_ = framework::LibraryType::kCUDNN;
|
|
} else {
|
|
library_ = framework::LibraryType::kPlain;
|
|
}
|
|
|
|
framework::DataLayout layout_ = framework::DataLayout::kAnyLayout;
|
|
return framework::OpKernelType(
|
|
OperatorWithKernel::IndicateVarDataType(ctx, "Input"), ctx.GetPlace(),
|
|
layout_, library_);
|
|
}
|
|
|
|
template <typename T>
|
|
class ConvTransposeGradOpMaker : public framework::SingleGradOpMaker<T> {
|
|
public:
|
|
using framework::SingleGradOpMaker<T>::SingleGradOpMaker;
|
|
|
|
protected:
|
|
void Apply(GradOpPtr<T> op) const override {
|
|
op->SetType(this->ForwardOpType() + "_grad");
|
|
op->SetInput("Input", this->Input("Input"));
|
|
op->SetInput("Filter", this->Input("Filter"));
|
|
op->SetOutput(framework::GradVarName("Input"), this->InputGrad("Input"));
|
|
op->SetOutput(framework::GradVarName("Filter"), this->InputGrad("Filter"));
|
|
if (this->HasInput("Bias")) {
|
|
op->SetInput("Bias", this->Input("Bias"));
|
|
op->SetOutput(framework::GradVarName("Bias"), this->InputGrad("Bias"));
|
|
}
|
|
op->SetInput(framework::GradVarName("Output"), this->OutputGrad("Output"));
|
|
op->SetAttrMap(this->Attrs());
|
|
}
|
|
};
|
|
|
|
} // namespace operators
|
|
} // namespace paddle
|
|
|
|
namespace ops = paddle::operators;
|
|
|
|
// conv2d_transpose
|
|
REGISTER_OPERATOR(conv2d_transpose, ops::ConvTransposeOp,
|
|
ops::Conv2DTransposeOpMaker,
|
|
ops::ConvTransposeGradOpMaker<paddle::framework::OpDesc>,
|
|
ops::ConvTransposeGradOpMaker<paddle::imperative::OpBase>);
|
|
REGISTER_OPERATOR(conv2d_transpose_grad, ops::ConvTransposeOpGrad);
|
|
|
|
REGISTER_OP_CPU_KERNEL(
|
|
conv2d_transpose,
|
|
ops::GemmConvTransposeKernel<paddle::platform::CPUDeviceContext, float>,
|
|
ops::GemmConvTransposeKernel<paddle::platform::CPUDeviceContext, double>);
|
|
REGISTER_OP_CPU_KERNEL(
|
|
conv2d_transpose_grad,
|
|
ops::GemmConvTransposeGradKernel<paddle::platform::CPUDeviceContext, float>,
|
|
ops::GemmConvTransposeGradKernel<paddle::platform::CPUDeviceContext,
|
|
double>);
|
|
|
|
// conv3d_transpose
|
|
REGISTER_OPERATOR(conv3d_transpose, ops::ConvTransposeOp,
|
|
ops::Conv3DTransposeOpMaker,
|
|
ops::ConvTransposeGradOpMaker<paddle::framework::OpDesc>,
|
|
ops::ConvTransposeGradOpMaker<paddle::imperative::OpBase>);
|
|
REGISTER_OPERATOR(conv3d_transpose_grad, ops::ConvTransposeOpGrad);
|
|
|
|
REGISTER_OP_CPU_KERNEL(
|
|
conv3d_transpose,
|
|
ops::GemmConvTransposeKernel<paddle::platform::CPUDeviceContext, float>,
|
|
ops::GemmConvTransposeKernel<paddle::platform::CPUDeviceContext, double>);
|
|
REGISTER_OP_CPU_KERNEL(
|
|
conv3d_transpose_grad,
|
|
ops::GemmConvTransposeGradKernel<paddle::platform::CPUDeviceContext, float>,
|
|
ops::GemmConvTransposeGradKernel<paddle::platform::CPUDeviceContext,
|
|
double>);
|
|
|
|
// depthwise conv2d_transpose
|
|
REGISTER_OPERATOR(depthwise_conv2d_transpose, ops::ConvTransposeOp,
|
|
ops::Conv2DTransposeOpMaker,
|
|
ops::ConvTransposeGradOpMaker<paddle::framework::OpDesc>,
|
|
ops::ConvTransposeGradOpMaker<paddle::imperative::OpBase>);
|
|
REGISTER_OPERATOR(depthwise_conv2d_transpose_grad, ops::ConvTransposeOpGrad);
|
|
|
|
REGISTER_OP_CPU_KERNEL(
|
|
depthwise_conv2d_transpose,
|
|
ops::GemmConvTransposeKernel<paddle::platform::CPUDeviceContext, float>,
|
|
ops::GemmConvTransposeKernel<paddle::platform::CPUDeviceContext, double>);
|
|
REGISTER_OP_CPU_KERNEL(
|
|
depthwise_conv2d_transpose_grad,
|
|
ops::GemmConvTransposeGradKernel<paddle::platform::CPUDeviceContext, float>,
|
|
ops::GemmConvTransposeGradKernel<paddle::platform::CPUDeviceContext,
|
|
double>);
|