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224 lines
8.1 KiB
224 lines
8.1 KiB
/* Copyright (c) 2020 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include <paddle/fluid/platform/device_context.h>
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/memory/malloc.h"
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#include "paddle/fluid/operators/partial_sum_op.h"
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#include "paddle/fluid/platform/float16.h"
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namespace plat = paddle::platform;
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namespace paddle {
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namespace operators {
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#define CEIL_DIV(x, y) (((x) + (y)-1) / (y))
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using LoDTensor = framework::LoDTensor;
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using Tensor = framework::Tensor;
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template <class T>
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__global__ void SumArrayPartialCUDAKernel(T **in, T *out, int64_t lod_length,
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size_t in_size, int64_t start_index,
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int64_t length, int64_t row_length) {
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int id = blockIdx.x * blockDim.x + threadIdx.x;
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while (id < lod_length) {
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T total = static_cast<T>(0);
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int b_id = id / length;
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int b_offset = id % length;
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for (int i = 0; i < in_size; ++i) {
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const T *tmp = in[i];
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if (tmp) {
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total += tmp[start_index + b_id * row_length + b_offset];
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}
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}
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out[id] = total;
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id += blockDim.x * gridDim.x;
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}
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}
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template <class T>
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__global__ void PartialSumGradCUDAKernel(T **res_grad, const T *out_grad,
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int64_t lod_length, size_t in_size,
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int64_t start_index, int64_t length,
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int64_t row_length) {
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int id = blockIdx.x * blockDim.x + threadIdx.x;
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while (id < lod_length) {
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T total = static_cast<T>(0);
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int b_id = id / length;
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int b_offset = id % length;
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for (int i = 0; i < in_size; ++i) {
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T *tmp = res_grad[i];
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tmp[start_index + b_id * row_length + b_offset] = out_grad[i];
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}
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id += blockDim.x * gridDim.x;
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}
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}
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template <typename T>
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class PartialSumOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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auto in_vars = ctx.MultiInput<Tensor>("X");
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Tensor *out = ctx.Output<Tensor>("Out");
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PADDLE_ENFORCE_EQ(
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in_vars[0] != nullptr, true,
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platform::errors::InvalidArgument("The input should not be null."));
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auto place = ctx.GetPlace(); // GPUPlace only now
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auto start_index = ctx.Attr<int>("start_index");
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auto length = ctx.Attr<int>("length");
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auto batch_size = in_vars[0]->dims()[0];
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if (length == -1) {
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length = in_vars[0]->dims()[1] - start_index;
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}
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constexpr size_t theory_sm_threads = 1024;
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auto &dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
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auto stream = dev_ctx.stream();
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auto max_threads = dev_ctx.GetMaxPhysicalThreadCount();
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auto sm_count = max_threads / theory_sm_threads;
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size_t tile_size = 0;
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dim3 grids;
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dim3 blocks;
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auto ComputeKernelParameter = [&](size_t length) {
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if (length >= max_threads)
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tile_size = 1024;
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else if (length < max_threads && length > sm_count * 128)
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tile_size = 512;
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else if (length <= sm_count * 128)
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tile_size = 256;
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grids = dim3(CEIL_DIV(length, tile_size), 1, 1);
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blocks = dim3(tile_size, 1, 1);
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};
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auto lod_length = length * batch_size;
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auto row_length = in_vars[0]->dims()[1];
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auto in_num = in_vars.size();
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std::vector<const T *> in_data;
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for (int i = 0; i < in_num; ++i) {
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in_data.emplace_back(in_vars[i]->data<T>());
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}
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if (!in_data.empty()) {
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auto tmp_in_array = memory::Alloc(dev_ctx, in_data.size() * sizeof(T *));
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memory::Copy(BOOST_GET_CONST(platform::CUDAPlace, dev_ctx.GetPlace()),
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tmp_in_array->ptr(), platform::CPUPlace(),
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reinterpret_cast<void *>(in_data.data()),
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in_data.size() * sizeof(T *), dev_ctx.stream());
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T **in_array_data = reinterpret_cast<T **>(tmp_in_array->ptr());
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ComputeKernelParameter(lod_length);
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SumArrayPartialCUDAKernel<T><<<grids, blocks, 0, stream>>>(
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in_array_data, out->data<T>(), lod_length, in_data.size(),
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start_index, length, row_length);
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}
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}
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};
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template <typename T>
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class PartialSumGradOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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const Tensor *out_grad = ctx.Input<Tensor>(framework::GradVarName("Out"));
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auto ins = ctx.MultiInput<LoDTensor>("X");
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auto outs = ctx.MultiOutput<LoDTensor>(framework::GradVarName("X"));
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PADDLE_ENFORCE_EQ(
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ins[0] != nullptr, true,
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platform::errors::InvalidArgument("The input should not be null."));
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auto start_index = ctx.Attr<int>("start_index");
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auto length = ctx.Attr<int>("length");
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if (length == -1) {
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length = ins[0]->dims()[1] - start_index;
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}
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// initialize
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auto &place = *ctx.template device_context<platform::CUDADeviceContext>()
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.eigen_device();
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for (size_t i = 0; i < outs.size(); ++i) {
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outs[i]->mutable_data<T>(ctx.GetPlace());
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auto dxt = framework::EigenVector<T>::Flatten(*outs[i]);
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dxt.device(place) = dxt.constant(static_cast<T>(0));
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}
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auto batch_size = ins[0]->dims()[0];
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if (length == -1) {
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length = ins[0]->dims()[1] - start_index;
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}
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auto lod_length = length * batch_size;
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auto row_length = ins[0]->dims()[1];
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auto out_num = outs.size();
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constexpr size_t theory_sm_threads = 1024;
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auto &dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
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auto stream = dev_ctx.stream();
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auto max_threads = dev_ctx.GetMaxPhysicalThreadCount();
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auto sm_count = max_threads / theory_sm_threads;
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size_t tile_size = 0;
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dim3 grids;
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dim3 blocks;
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auto ComputeKernelParameter = [&](size_t length) {
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if (length >= max_threads)
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tile_size = 1024;
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else if (length < max_threads && length > sm_count * 128)
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tile_size = 512;
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else if (length <= sm_count * 128)
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tile_size = 256;
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grids = dim3(CEIL_DIV(length, tile_size), 1, 1);
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blocks = dim3(tile_size, 1, 1);
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};
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std::vector<const T *> out_data;
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for (int i = 0; i < out_num; ++i) {
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out_data.emplace_back(outs[i]->data<T>());
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}
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if (!out_data.empty()) {
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auto tmp_out_array =
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memory::Alloc(dev_ctx, out_data.size() * sizeof(T *));
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memory::Copy(BOOST_GET_CONST(platform::CUDAPlace, dev_ctx.GetPlace()),
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tmp_out_array->ptr(), platform::CPUPlace(),
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reinterpret_cast<void *>(out_data.data()),
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out_data.size() * sizeof(T *), dev_ctx.stream());
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T **out_grad_data = reinterpret_cast<T **>(tmp_out_array->ptr());
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ComputeKernelParameter(lod_length);
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PartialSumGradCUDAKernel<T><<<grids, blocks, 0, stream>>>(
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out_grad_data, out_grad->data<T>(), lod_length, out_data.size(),
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start_index, length, row_length);
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}
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP_CUDA_KERNEL(partial_sum, ops::PartialSumOpCUDAKernel<float>,
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ops::PartialSumOpCUDAKernel<double>,
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ops::PartialSumOpCUDAKernel<int>,
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ops::PartialSumOpCUDAKernel<int64_t>,
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ops::PartialSumOpCUDAKernel<plat::float16>);
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REGISTER_OP_CUDA_KERNEL(partial_sum_grad,
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ops::PartialSumGradOpCUDAKernel<float>,
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ops::PartialSumGradOpCUDAKernel<double>,
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ops::PartialSumGradOpCUDAKernel<int>,
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ops::PartialSumGradOpCUDAKernel<int64_t>,
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ops::PartialSumGradOpCUDAKernel<plat::float16>);
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