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251 lines
10 KiB
251 lines
10 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/operators/uniform_random_op.h"
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#include <string>
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/framework/operator.h"
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namespace paddle {
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namespace operators {
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// It seems that Eigen::Tensor::random in GPU will SEGFAULT.
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// Use std::random and thrust::random(thrust is a std library in CUDA) to
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// implement uniform random.
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template <typename T>
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class CPUUniformRandomKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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framework::Tensor *tensor = nullptr;
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auto out_var = ctx.OutputVar("Out");
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std::vector<int64_t> new_shape;
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auto list_new_shape_tensor =
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ctx.MultiInput<framework::Tensor>("ShapeTensorList");
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if (list_new_shape_tensor.size() > 0 || ctx.HasInput("ShapeTensor")) {
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if (ctx.HasInput("ShapeTensor")) {
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auto *shape_tensor = ctx.Input<framework::Tensor>("ShapeTensor");
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new_shape = GetNewDataFromShapeTensor(shape_tensor);
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} else if (list_new_shape_tensor.size() > 0) {
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new_shape = GetNewDataFromShapeTensorList(list_new_shape_tensor);
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}
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}
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if (out_var->IsType<framework::SelectedRows>()) {
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auto *selected_rows = out_var->GetMutable<framework::SelectedRows>();
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tensor = selected_rows->mutable_value();
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auto shape = ctx.Attr<std::vector<int64_t>>("shape");
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if (!new_shape.empty()) shape = new_shape;
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tensor->Resize(framework::make_ddim(shape));
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selected_rows->mutable_rows()->reserve(shape[0]);
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} else if (out_var->IsType<framework::LoDTensor>()) {
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tensor = out_var->GetMutable<framework::LoDTensor>();
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if (!new_shape.empty()) tensor->Resize(framework::make_ddim(new_shape));
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} else {
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PADDLE_THROW(
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"uniform_random_op's output only"
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"supports SelectedRows and LoDTensor");
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}
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T *data = tensor->mutable_data<T>(ctx.GetPlace());
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unsigned int seed = static_cast<unsigned int>(ctx.Attr<int>("seed"));
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std::minstd_rand engine;
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if (seed == 0) {
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seed = std::random_device()();
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}
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engine.seed(seed);
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std::uniform_real_distribution<T> dist(
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static_cast<T>(ctx.Attr<float>("min")),
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static_cast<T>(ctx.Attr<float>("max")));
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int64_t size = tensor->numel();
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for (int64_t i = 0; i < size; ++i) {
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data[i] = dist(engine);
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}
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unsigned int diag_num =
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static_cast<unsigned int>(ctx.Attr<int>("diag_num"));
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unsigned int diag_step =
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static_cast<unsigned int>(ctx.Attr<int>("diag_step"));
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auto diag_val = static_cast<T>(ctx.Attr<float>("diag_val"));
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if (diag_num > 0) {
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PADDLE_ENFORCE_GT(size, (diag_num - 1) * (diag_step + 1),
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"ShapeError: the diagonal's elements is equal (num-1) "
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"* (step-1) with num %d, step %d,"
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"It should be smaller than %d, but received %d",
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diag_num, diag_step, (diag_num - 1) * (diag_step + 1),
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size);
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for (int64_t i = 0; i < diag_num; ++i) {
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int64_t pos = i * diag_step + i;
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data[pos] = diag_val;
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}
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}
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}
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};
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class UniformRandomOp : public framework::OperatorWithKernel {
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public:
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using framework::OperatorWithKernel::OperatorWithKernel;
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void InferShape(framework::InferShapeContext *ctx) const override {
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PADDLE_ENFORCE_EQ(ctx->HasOutput("Out"), true,
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"Output(Out) of UniformRandomOp should not be null.");
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PADDLE_ENFORCE_LT(ctx->Attrs().Get<float>("min"),
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ctx->Attrs().Get<float>("max"),
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"uniform_random's min must less then max");
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PADDLE_ENFORCE_GE(ctx->Attrs().Get<int>("diag_num"), 0,
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"diag_num must greater than or equal 0");
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PADDLE_ENFORCE_GE(ctx->Attrs().Get<int>("diag_step"), 0,
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"diag_step must greater than or equal 0");
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if (ctx->HasInputs("ShapeTensorList")) {
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// top prority shape
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auto inputs_name = ctx->Inputs("ShapeTensorList");
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PADDLE_ENFORCE_GT(
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inputs_name.size(), 0,
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"Input(ShapeTensorList)'size of Op(uniform_random) can't be zero."
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"Please check the Attr(shape)'s size of"
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"Op(fluid.layers.uniform_random).)");
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auto out_dims = std::vector<int>(inputs_name.size(), -1);
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ctx->SetOutputDim("Out", framework::make_ddim(out_dims));
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return;
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}
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auto &shape = ctx->Attrs().Get<std::vector<int64_t>>("shape");
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if (ctx->HasInput("ShapeTensor") && shape.empty()) {
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auto shape_dims = ctx->GetInputDim("ShapeTensor");
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PADDLE_ENFORCE_EQ(
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shape_dims.size(), 1,
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"ShapeError: Input(ShapeTensor)' dimension size of "
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"Op(uniform_random) must be 1."
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"But received ShapeTensor's dimensions = %d, shape = [%s]",
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shape_dims.size(), shape_dims);
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int num_ele = 1;
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for (int i = 0; i < shape_dims.size(); ++i) {
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num_ele *= shape_dims[i];
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}
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auto vec_dims = std::vector<int64_t>(num_ele, -1);
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auto out_dims = framework::make_ddim(vec_dims);
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ctx->SetOutputDim("Out", out_dims);
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return;
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}
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PADDLE_ENFORCE_EQ(
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shape.empty(), false,
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"if there is no Input(ShapeTensorList) and no Input(ShapeTensor),the "
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"attr(shape) information must "
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"be set by Attr(shape).");
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std::vector<int64_t> tensor_shape;
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tensor_shape.reserve(shape.size());
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for (auto dim : shape) {
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tensor_shape.push_back(static_cast<int64_t>(dim));
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}
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ctx->SetOutputDim("Out", framework::make_ddim(tensor_shape));
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}
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protected:
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framework::OpKernelType GetExpectedKernelType(
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const framework::ExecutionContext &ctx) const override {
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return framework::OpKernelType(
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static_cast<framework::proto::VarType::Type>(ctx.Attr<int>("dtype")),
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ctx.GetPlace());
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}
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framework::OpKernelType GetKernelTypeForVar(
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const std::string &var_name, const Tensor &tensor,
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const framework::OpKernelType &expected_kernel_type) const override {
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if (var_name == "ShapeTensorList" || var_name == "ShapeTensor") {
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return expected_kernel_type;
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}
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return framework::OpKernelType(expected_kernel_type.data_type_,
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tensor.place(), tensor.layout());
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}
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};
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class UniformRandomOpMaker : public framework::OpProtoAndCheckerMaker {
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public:
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void Make() override {
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AddInput("ShapeTensor",
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"(Tensor<int64_t> or Tensor<int32_t>, optional) . If provided, "
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"uniform_random "
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"according to "
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"this given shape. It means that it has a higher priority than "
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"the shape attribute, while the shape attribute still should be "
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"set correctly to guarantee shape inference in compile time.")
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.AsDispensable();
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AddInput("ShapeTensorList",
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"(vector<Tensor<int64_t>> or vector<Tensor<int32_t>>, optional). "
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"If provided, uniform_random use this. The shape of the tensor "
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"must be [1], it has the highest priority comparing with "
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"Input(ShapeTensor) and attr(shape).")
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.AsDuplicable()
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.AsDispensable();
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AddOutput("Out", "The output tensor of uniform random op");
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AddComment(R"DOC(
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This operator initializes a tensor with random values sampled from a
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uniform distribution. The random result is in set [min, max).
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)DOC");
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AddAttr<std::vector<int64_t>>("shape", "The shape of the output tensor")
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.SetDefault({});
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AddAttr<float>("min", "Minimum value of uniform random. [default -1.0].")
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.SetDefault(-1.0f);
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AddAttr<float>("max", "Maximun value of uniform random. [default 1.0].")
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.SetDefault(1.0f);
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AddAttr<int>("seed",
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"Random seed used for generating samples. "
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"0 means use a seed generated by the system."
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"Note that if seed is not 0, this operator will always "
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"generate the same random numbers every time. [default 0].")
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.SetDefault(0);
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AddAttr<int>("diag_num",
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"The number of diag elements. Note that if "
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"diag_num is 0, it means without diag init.[default 0].")
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.SetDefault(0);
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AddAttr<int>("diag_step", "The step between two diag element.[default 0].")
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.SetDefault(0);
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AddAttr<float>("diag_val", "The value of diag element. [default 1.0].")
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.SetDefault(1.0f);
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AddAttr<int>("dtype", "Output tensor data type. [default 5(FP32)].")
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.SetDefault(framework::proto::VarType::FP32);
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}
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};
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class UniformRandomOpVarTypeInference : public framework::VarTypeInference {
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public:
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void operator()(framework::InferVarTypeContext *ctx) const override {
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auto out_var_name = ctx->Output("Out").front();
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auto var_data_type = static_cast<framework::proto::VarType::Type>(
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boost::get<int>(ctx->GetAttr("dtype")));
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if (ctx->GetType(out_var_name) !=
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framework::proto::VarType::SELECTED_ROWS) {
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ctx->SetType(out_var_name, framework::proto::VarType::LOD_TENSOR);
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}
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ctx->SetDataType(out_var_name, var_data_type);
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}
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};
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} // namespace operators
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} // namespace paddle
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REGISTER_OPERATOR(
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uniform_random, paddle::operators::UniformRandomOp,
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paddle::operators::UniformRandomOpMaker,
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paddle::framework::EmptyGradOpMaker<paddle::framework::OpDesc>,
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paddle::framework::EmptyGradOpMaker<paddle::imperative::OpBase>,
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paddle::operators::UniformRandomOpVarTypeInference);
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REGISTER_OP_CPU_KERNEL(uniform_random,
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paddle::operators::CPUUniformRandomKernel<float>,
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paddle::operators::CPUUniformRandomKernel<double>);
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REGISTER_OP_CPU_KERNEL(uniform_random_batch_size_like,
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paddle::operators::CPUUniformRandomKernel<float>,
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paddle::operators::CPUUniformRandomKernel<double>);
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