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141 lines
4.5 KiB
141 lines
4.5 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "SwitchOp.h"
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#include "paddle/math/Vector.h"
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namespace paddle {
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template <>
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void NCHW2NHWC<DEVICE_TYPE_CPU>(real* outputs,
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const real* inputs,
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const int num,
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const int inC,
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const int inH,
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const int inW,
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const int argType) {
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for (int n = 0; n < num; ++n) {
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for (int c = 0; c < inC; ++c) {
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for (int h = 0; h < inH; ++h) {
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for (int w = 0; w < inW; ++w) {
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if (argType == ADD_TO) {
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outputs[((n * inH + h) * inW + w) * inC + c] += *(inputs++);
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} else {
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outputs[((n * inH + h) * inW + w) * inC + c] = *(inputs++);
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}
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}
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}
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}
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}
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}
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template <>
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void NHWC2NCHW<DEVICE_TYPE_CPU>(real* outputs,
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const real* inputs,
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const int num,
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const int inH,
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const int inW,
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const int inC,
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const int argType) {
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for (int n = 0; n < num; ++n) {
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for (int h = 0; h < inH; ++h) {
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for (int w = 0; w < inW; ++w) {
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for (int c = 0; c < inC; ++c) {
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if (argType == ADD_TO) {
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outputs[((n * inC + c) * inH + h) * inW + w] += *(inputs++);
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} else {
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outputs[((n * inC + c) * inH + h) * inW + w] = *(inputs++);
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}
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}
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}
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}
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}
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}
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/**
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* \brief Switch dimension order of image input.
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* The input and output is a 4D tensor. Switch order
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* 'batch_size,channels, height, width' to
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* order 'batch_size, height, width, channels'.
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*
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* Argument in this Function:
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* \param inputs input data with order 'batch_size,channels, height, width'.
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* \param outputs output data with order 'batch_size, height, width, channels'.
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*/
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template <DeviceType Device>
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class NCHW2NHWCFunc : public FunctionBase {
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public:
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void init(const FuncConfig& config) override {}
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void calc(const BufferArgs& inputs, const BufferArgs& outputs) override {
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CHECK_EQ(1UL, inputs.size());
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CHECK_EQ(1UL, outputs.size());
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size_t num = inputs[0].shape()[0];
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size_t inC = inputs[0].shape()[1];
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size_t inH = inputs[0].shape()[2];
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size_t inW = inputs[0].shape()[3];
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NCHW2NHWC<Device>(outputs[0].data<real>(),
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inputs[0].data<real>(),
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num,
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inC,
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inH,
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inW,
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outputs[0].getArgType());
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}
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};
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/**
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* \brief Switch dimension order of image input.
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* The input and output is a 4D tensor. Switch order
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* 'batch_size, height, width, channels' to
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* order 'batch_size, channels, height, width'.
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*
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* Argument in this Function:
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* \param inputs input data with order 'batch_size, height, width, channels'.
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* \param outputs output data with order 'batch_size, channels, height, width'.
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*/
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template <DeviceType Device>
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class NHWC2NCHWFunc : public FunctionBase {
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public:
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void init(const FuncConfig& config) override {}
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void calc(const BufferArgs& inputs, const BufferArgs& outputs) override {
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CHECK_EQ(1UL, inputs.size());
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CHECK_EQ(1UL, outputs.size());
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size_t num = inputs[0].shape()[0];
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size_t inH = inputs[0].shape()[1];
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size_t inW = inputs[0].shape()[2];
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size_t inC = inputs[0].shape()[3];
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NHWC2NCHW<Device>(outputs[0].data<real>(),
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inputs[0].data<real>(),
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num,
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inH,
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inW,
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inC,
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outputs[0].getArgType());
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}
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};
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REGISTER_TYPED_FUNC(NCHW2NHWC, CPU, NCHW2NHWCFunc);
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REGISTER_TYPED_FUNC(NHWC2NCHW, CPU, NHWC2NCHWFunc);
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#ifdef PADDLE_WITH_CUDA
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REGISTER_TYPED_FUNC(NCHW2NHWC, GPU, NCHW2NHWCFunc);
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REGISTER_TYPED_FUNC(NHWC2NCHW, GPU, NHWC2NCHWFunc);
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#endif
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} // namespace paddle
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