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118 lines
4.4 KiB
118 lines
4.4 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/framework/operator.h"
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namespace paddle {
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namespace operators {
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// It seems that Eigen::Tensor::random in GPU will SEGFAULT.
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// Use std::random and thrust::random(thrust is a std library in CUDA) to
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// implement uniform random.
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template <typename T>
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class CPUUniformRandomKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext& ctx) const override {
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auto* tensor = ctx.Output<framework::Tensor>("Out");
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T* data = tensor->mutable_data<T>(ctx.GetPlace());
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unsigned int seed = static_cast<unsigned int>(ctx.Attr<int>("seed"));
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std::minstd_rand engine;
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if (seed == 0) {
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seed = std::random_device()();
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}
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engine.seed(seed);
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std::uniform_real_distribution<T> dist(
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static_cast<T>(ctx.Attr<float>("min")),
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static_cast<T>(ctx.Attr<float>("max")));
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int64_t size = tensor->numel();
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for (int64_t i = 0; i < size; ++i) {
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data[i] = dist(engine);
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}
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}
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};
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class UniformRandomOp : public framework::OperatorWithKernel {
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public:
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using framework::OperatorWithKernel::OperatorWithKernel;
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void InferShape(framework::InferShapeContext* ctx) const override {
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PADDLE_ENFORCE(ctx->HasOutput("Out"),
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"Output(Out) of UniformRandomOp should not be null.");
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PADDLE_ENFORCE(
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ctx->Attrs().Get<float>("min") < ctx->Attrs().Get<float>("max"),
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"uniform_random's min must less then max");
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auto& shape = ctx->Attrs().Get<std::vector<int>>("shape");
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std::vector<int64_t> temp;
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temp.reserve(shape.size());
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for (auto dim : shape) {
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temp.push_back(static_cast<int64_t>(dim));
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}
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ctx->SetOutputDim("Out", framework::make_ddim(temp));
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}
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protected:
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framework::OpKernelType GetExpectedKernelType(
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const framework::ExecutionContext& ctx) const override {
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return framework::OpKernelType(
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static_cast<framework::proto::DataType>(ctx.Attr<int>("dtype")),
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ctx.GetPlace());
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}
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};
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class UniformRandomOpMaker : public framework::OpProtoAndCheckerMaker {
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public:
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UniformRandomOpMaker(OpProto* proto, OpAttrChecker* op_checker)
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: framework::OpProtoAndCheckerMaker(proto, op_checker) {
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AddOutput("Out", "(Tensor) The output tensor of uniform random op");
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AddComment(R"DOC(
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Uniform random operator.
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This operator initializes a tensor with random values sampled from a
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uniform distribution.
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)DOC");
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AddAttr<std::vector<int>>("shape",
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"(vector<int>) The shape of the output tensor");
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AddAttr<float>("min",
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"(float, default -1.0) "
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"Minimum value of uniform random")
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.SetDefault(-1.0f);
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AddAttr<float>("max",
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"(float, default 1.0) "
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"Maximun value of uniform random")
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.SetDefault(1.0f);
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AddAttr<int>("seed",
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"(int, default 0) "
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"Random seed used for generating samples. "
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"0 means use a seed generated by the system."
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"Note that if seed is not 0, this operator will always "
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"generate the same random numbers every time.")
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.SetDefault(0);
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AddAttr<int>("dtype", "(int, default 5(FP32)) Output tensor data type")
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.SetDefault(framework::proto::DataType::FP32);
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}
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};
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} // namespace operators
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} // namespace paddle
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REGISTER_OP_WITHOUT_GRADIENT(uniform_random, paddle::operators::UniformRandomOp,
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paddle::operators::UniformRandomOpMaker);
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REGISTER_OP_CPU_KERNEL(uniform_random,
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paddle::operators::CPUUniformRandomKernel<float>,
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paddle::operators::CPUUniformRandomKernel<double>);
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REGISTER_OP_CPU_KERNEL(uniform_random_batch_size_like,
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paddle::operators::CPUUniformRandomKernel<float>,
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paddle::operators::CPUUniformRandomKernel<double>);
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