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112 lines
4.2 KiB
112 lines
4.2 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/operators/bilinear_interp_op.cu.h"
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#include "paddle/fluid/operators/math/math_function.h"
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namespace paddle {
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namespace operators {
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using framework::Tensor;
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template <typename T>
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class BilinearInterpOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext& ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"This kernel only runs on GPU device.");
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auto* input_t = ctx.Input<Tensor>("X"); // float tensor
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auto* output_t = ctx.Output<Tensor>("Out"); // float tensor
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auto* input = input_t->data<T>();
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auto* output = output_t->mutable_data<T>(ctx.GetPlace());
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int out_h = ctx.Attr<int>("out_h");
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int out_w = ctx.Attr<int>("out_w");
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int batch_size = input_t->dims()[0];
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int channels = input_t->dims()[1];
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int in_h = input_t->dims()[2];
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int in_w = input_t->dims()[3];
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int in_hw = in_h * in_w;
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int out_hw = out_h * out_w;
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int in_chw = channels * in_hw;
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int out_chw = channels * out_hw;
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T ratio_h = (out_h > 1) ? static_cast<T>(in_h - 1) / (out_h - 1) : 0.f;
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T ratio_w = (out_w > 1) ? static_cast<T>(in_w - 1) / (out_w - 1) : 0.f;
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if (in_h == out_h && in_w == out_w) {
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memcpy(output, input, input_t->numel() * sizeof(T));
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} else {
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int threadNum = batch_size * out_chw;
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int blocks = (threadNum + 1024 - 1) / 1024;
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KeBilinearInterpFw<
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T><<<blocks, 1024, 0, ctx.cuda_device_context().stream()>>>(
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input, in_h, in_w, batch_size, in_chw, output, out_h, out_w,
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batch_size, out_chw, channels, ratio_h, ratio_w);
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}
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}
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};
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template <typename T>
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class BilinearInterpGradOpCUDAKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext& ctx) const override {
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auto* d_input_t = ctx.Output<Tensor>(framework::GradVarName("X"));
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auto* d_output_t = ctx.Input<Tensor>(framework::GradVarName("Out"));
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auto* d_input = d_input_t->mutable_data<T>(ctx.GetPlace());
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auto* d_output = d_output_t->data<T>();
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auto& device_ctx =
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ctx.template device_context<platform::CUDADeviceContext>();
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math::SetConstant<platform::CUDADeviceContext, T> zero;
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zero(device_ctx, d_input_t, static_cast<T>(0.0));
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int out_h = ctx.Attr<int>("out_h");
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int out_w = ctx.Attr<int>("out_w");
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int batch_size = d_input_t->dims()[0];
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int channels = d_input_t->dims()[1];
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int in_h = d_input_t->dims()[2];
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int in_w = d_input_t->dims()[3];
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int in_hw = in_h * in_w;
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int out_hw = out_h * out_w;
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int in_chw = channels * in_hw;
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int out_chw = channels * out_hw;
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T ratio_h = (out_h > 1) ? static_cast<T>(in_h - 1) / (out_h - 1) : 0.f;
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T ratio_w = (out_w > 1) ? static_cast<T>(in_w - 1) / (out_w - 1) : 0.f;
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if (in_h == out_h && in_w == out_w) {
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memcpy(d_input, d_output, d_input_t->numel() * sizeof(T));
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} else {
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int threadNum = batch_size * out_chw;
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int blocks = (threadNum + 1024 - 1) / 1024;
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KeBilinearInterpBw<
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T><<<blocks, 1024, 0, ctx.cuda_device_context().stream()>>>(
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d_input, in_h, in_w, batch_size, in_chw, d_output, out_h, out_w,
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batch_size, out_chw, channels, ratio_h, ratio_w);
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}
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP_CUDA_KERNEL(bilinear_interp,
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ops::BilinearInterpOpCUDAKernel<float>);
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REGISTER_OP_CUDA_KERNEL(bilinear_interp_grad,
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ops::BilinearInterpGradOpCUDAKernel<float>);
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