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267 lines
12 KiB
267 lines
12 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/framework/eigen.h"
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/memory/memory.h"
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#include "paddle/fluid/operators/conv_transpose_op.h"
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#include "paddle/fluid/platform/assert.h"
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#include "paddle/fluid/platform/cudnn_helper.h"
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namespace paddle {
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namespace operators {
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using Tensor = framework::Tensor;
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using ScopedTensorDescriptor = platform::ScopedTensorDescriptor;
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using ScopedFilterDescriptor = platform::ScopedFilterDescriptor;
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using ScopedConvolutionDescriptor = platform::ScopedConvolutionDescriptor;
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using DataLayout = platform::DataLayout;
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static constexpr size_t kConvCUDNNWorkspaceLimitBytes = 1024 * 1024 * 1024;
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template <typename T>
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class CUDNNConvTransposeOpKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext& ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"It must use CUDAPlace.");
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auto* input = ctx.Input<Tensor>("Input");
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auto* filter = ctx.Input<Tensor>("Filter");
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auto* output = ctx.Output<Tensor>("Output");
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std::vector<int> strides = ctx.Attr<std::vector<int>>("strides");
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std::vector<int> paddings = ctx.Attr<std::vector<int>>("paddings");
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// cudnn v5 does not support dilations
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std::vector<int> dilations = ctx.Attr<std::vector<int>>("dilations");
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int groups = ctx.Attr<int>("groups");
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int user_workspace_size = ctx.Attr<int>("workspace_size_MB");
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const T* input_data = input->data<T>();
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const T* filter_data = filter->data<T>();
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T* output_data = output->mutable_data<T>(ctx.GetPlace());
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// ------------------- cudnn descriptors ---------------------
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ScopedTensorDescriptor input_desc;
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ScopedTensorDescriptor output_desc;
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ScopedFilterDescriptor filter_desc;
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ScopedConvolutionDescriptor conv_desc;
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DataLayout layout;
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if (strides.size() == 2U) {
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layout = DataLayout::kNCHW;
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} else {
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layout = DataLayout::kNCDHW;
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}
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// (N, M, H, W) or (N, M, D, H, W)
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cudnnTensorDescriptor_t cudnn_input_desc = input_desc.descriptor<T>(
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layout, framework::vectorize2int(input->dims()), groups);
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// (N, C, O_h, O_w) or (N, C, O_d, O_h, O_w)
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cudnnTensorDescriptor_t cudnn_output_desc = output_desc.descriptor<T>(
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layout, framework::vectorize2int(output->dims()), groups);
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// (M, C, K_h, K_w) or (M, C, K_d, K_h, K_w)
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cudnnFilterDescriptor_t cudnn_filter_desc = filter_desc.descriptor<T>(
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layout, framework::vectorize2int(filter->dims()), groups);
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cudnnConvolutionDescriptor_t cudnn_conv_desc =
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conv_desc.descriptor<T>(paddings, strides, dilations);
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// ------------------- cudnn conv workspace ---------------------
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size_t workspace_size_in_bytes; // final workspace to allocate.
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size_t workspace_size_limit = kConvCUDNNWorkspaceLimitBytes;
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if (user_workspace_size > 0) {
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workspace_size_limit = user_workspace_size * 1024 * 1024;
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}
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// ------------------- cudnn conv algorithm ---------------------
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cudnnConvolutionBwdDataAlgo_t algo;
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auto& dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
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auto handle = dev_ctx.cudnn_handle();
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// Get the algorithm
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CUDNN_ENFORCE(platform::dynload::cudnnGetConvolutionBackwardDataAlgorithm(
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handle, cudnn_filter_desc, cudnn_input_desc, cudnn_conv_desc,
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// dxDesc: Handle to the previously initialized output tensor
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// descriptor.
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cudnn_output_desc, CUDNN_CONVOLUTION_BWD_DATA_SPECIFY_WORKSPACE_LIMIT,
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workspace_size_limit, &algo));
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// get workspace size able to allocate
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CUDNN_ENFORCE(
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platform::dynload::cudnnGetConvolutionBackwardDataWorkspaceSize(
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handle, cudnn_filter_desc, cudnn_input_desc, cudnn_conv_desc,
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cudnn_output_desc, algo, &workspace_size_in_bytes));
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// ------------------- cudnn conv transpose forward ---------------------
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int input_offset = input->numel() / input->dims()[0] / groups;
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int output_offset = output->numel() / output->dims()[0] / groups;
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int filter_offset = filter->numel() / groups;
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T alpha = 1.0f, beta = 0.0f;
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auto workspace_handle = dev_ctx.cudnn_workspace_handle();
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for (int g = 0; g < groups; g++) {
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auto cudnn_func = [&](void* cudnn_workspace) {
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CUDNN_ENFORCE(platform::dynload::cudnnConvolutionBackwardData(
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handle, &alpha, cudnn_filter_desc, filter_data + filter_offset * g,
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cudnn_input_desc, input_data + input_offset * g, cudnn_conv_desc,
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algo, cudnn_workspace, workspace_size_in_bytes, &beta,
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cudnn_output_desc, output_data + output_offset * g));
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};
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workspace_handle.RunFunc(cudnn_func, workspace_size_in_bytes);
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}
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}
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};
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template <typename T>
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class CUDNNConvTransposeGradOpKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext& ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"It must use CUDAPlace.");
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auto input = ctx.Input<Tensor>("Input");
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auto filter = ctx.Input<Tensor>("Filter");
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auto output_grad = ctx.Input<Tensor>(framework::GradVarName("Output"));
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auto input_grad = ctx.Output<Tensor>(framework::GradVarName("Input"));
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auto filter_grad = ctx.Output<Tensor>(framework::GradVarName("Filter"));
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const T* input_data = input->data<T>();
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const T* output_grad_data = output_grad->data<T>();
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const T* filter_data = filter->data<T>();
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std::vector<int> strides = ctx.Attr<std::vector<int>>("strides");
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std::vector<int> paddings = ctx.Attr<std::vector<int>>("paddings");
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// cudnn v5 does not support dilations
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std::vector<int> dilations = ctx.Attr<std::vector<int>>("dilations");
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int groups = ctx.Attr<int>("groups");
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int user_workspace_size = ctx.Attr<int>("workspace_size_MB");
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// ------------------- cudnn descriptors ---------------------
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ScopedTensorDescriptor input_desc;
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ScopedTensorDescriptor output_desc;
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ScopedFilterDescriptor filter_desc;
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ScopedConvolutionDescriptor conv_desc;
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DataLayout layout = DataLayout::kNCHW;
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// Input: (N, M, H, W) or (N, M, D, H, W)
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cudnnTensorDescriptor_t cudnn_input_desc = input_desc.descriptor<T>(
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layout, framework::vectorize2int(input->dims()), groups);
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// Output: (N, C, O_h, O_w) or (N, C, O_d, O_h, O_w)
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cudnnTensorDescriptor_t cudnn_output_desc = output_desc.descriptor<T>(
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layout, framework::vectorize2int(output_grad->dims()), groups);
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// Filter (M, C, K_h, K_w) or (M, C, K_d K_h, K_w)
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cudnnFilterDescriptor_t cudnn_filter_desc = filter_desc.descriptor<T>(
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layout, framework::vectorize2int(filter->dims()), groups);
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cudnnConvolutionDescriptor_t cudnn_conv_desc =
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conv_desc.descriptor<T>(paddings, strides, dilations);
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// ------------------- cudnn backward algorithm ---------------------
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cudnnConvolutionFwdAlgo_t data_algo;
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cudnnConvolutionBwdFilterAlgo_t filter_algo;
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size_t bwd_filter_ws_size, fwd_ws_size;
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size_t workspace_size_in_bytes = 0;
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size_t workspace_size_limit = kConvCUDNNWorkspaceLimitBytes;
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if (user_workspace_size > 0) {
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workspace_size_limit = user_workspace_size * 1024 * 1024;
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}
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auto& dev_ctx = ctx.template device_context<platform::CUDADeviceContext>();
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auto handle = dev_ctx.cudnn_handle();
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if (input_grad) {
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// choose backward algorithm for data
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CUDNN_ENFORCE(platform::dynload::cudnnGetConvolutionForwardAlgorithm(
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handle, cudnn_output_desc, cudnn_filter_desc, cudnn_conv_desc,
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cudnn_input_desc, CUDNN_CONVOLUTION_FWD_SPECIFY_WORKSPACE_LIMIT,
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workspace_size_limit, &data_algo));
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CUDNN_ENFORCE(platform::dynload::cudnnGetConvolutionForwardWorkspaceSize(
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handle, cudnn_output_desc, cudnn_filter_desc, cudnn_conv_desc,
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cudnn_input_desc, data_algo, &fwd_ws_size));
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workspace_size_in_bytes = std::max(workspace_size_in_bytes, fwd_ws_size);
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}
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if (filter_grad) {
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// choose backward algorithm for filter
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CUDNN_ENFORCE(
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platform::dynload::cudnnGetConvolutionBackwardFilterAlgorithm(
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handle, cudnn_output_desc, cudnn_input_desc, cudnn_conv_desc,
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cudnn_filter_desc,
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CUDNN_CONVOLUTION_BWD_FILTER_SPECIFY_WORKSPACE_LIMIT,
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workspace_size_limit, &filter_algo));
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// get workspace for backwards filter algorithm
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CUDNN_ENFORCE(
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platform::dynload::cudnnGetConvolutionBackwardFilterWorkspaceSize(
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handle, cudnn_output_desc, cudnn_input_desc, cudnn_conv_desc,
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cudnn_filter_desc, filter_algo, &bwd_filter_ws_size));
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workspace_size_in_bytes =
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std::max(workspace_size_in_bytes, bwd_filter_ws_size);
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}
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// ------------------- cudnn conv backward data ---------------------
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// FIXME(typhoonzero): template type T may not be the same as cudnn call.
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int input_offset = input->numel() / input->dims()[0] / groups;
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int output_grad_offset =
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output_grad->numel() / output_grad->dims()[0] / groups;
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int filter_offset = filter->numel() / groups;
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T alpha = 1.0f, beta = 0.0f;
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auto workspace_handle = dev_ctx.cudnn_workspace_handle();
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if (input_grad) {
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T* input_grad_data = input_grad->mutable_data<T>(ctx.GetPlace());
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// Because beta is zero, it is unnecessary to reset input_grad.
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for (int g = 0; g < groups; g++) {
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auto cudnn_func = [&](void* cudnn_workspace) {
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CUDNN_ENFORCE(platform::dynload::cudnnConvolutionForward(
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handle, &alpha, cudnn_output_desc,
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output_grad_data + output_grad_offset * g, cudnn_filter_desc,
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filter_data + filter_offset * g, cudnn_conv_desc, data_algo,
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cudnn_workspace, workspace_size_in_bytes, &beta, cudnn_input_desc,
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input_grad_data + input_offset * g));
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};
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workspace_handle.RunFunc(cudnn_func, workspace_size_in_bytes);
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}
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}
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// ------------------- cudnn conv backward filter ---------------------
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if (filter_grad) {
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T* filter_grad_data = filter_grad->mutable_data<T>(ctx.GetPlace());
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// Because beta is zero, it is unnecessary to reset filter_grad.
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// Gradient with respect to the filter
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for (int g = 0; g < groups; g++) {
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auto cudnn_func = [&](void* cudnn_workspace) {
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CUDNN_ENFORCE(platform::dynload::cudnnConvolutionBackwardFilter(
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handle, &alpha, cudnn_output_desc,
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output_grad_data + output_grad_offset * g, cudnn_input_desc,
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input_data + input_offset * g, cudnn_conv_desc, filter_algo,
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cudnn_workspace, workspace_size_in_bytes, &beta,
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cudnn_filter_desc, filter_grad_data + filter_offset * g));
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};
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workspace_handle.RunFunc(cudnn_func, workspace_size_in_bytes);
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}
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}
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP_KERNEL(conv2d_transpose, CUDNN, ::paddle::platform::CUDAPlace,
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ops::CUDNNConvTransposeOpKernel<float>,
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ops::CUDNNConvTransposeOpKernel<double>);
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REGISTER_OP_KERNEL(conv2d_transpose_grad, CUDNN, ::paddle::platform::CUDAPlace,
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ops::CUDNNConvTransposeGradOpKernel<float>,
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ops::CUDNNConvTransposeGradOpKernel<double>);
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REGISTER_OP_KERNEL(conv3d_transpose, CUDNN, ::paddle::platform::CUDAPlace,
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ops::CUDNNConvTransposeOpKernel<float>,
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ops::CUDNNConvTransposeOpKernel<double>);
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REGISTER_OP_KERNEL(conv3d_transpose_grad, CUDNN, ::paddle::platform::CUDAPlace,
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ops::CUDNNConvTransposeGradOpKernel<float>,
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ops::CUDNNConvTransposeGradOpKernel<double>);
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