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82 lines
2.6 KiB
82 lines
2.6 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#pragma once
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#include "paddle/fluid/framework/tensor.h"
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#include "paddle/fluid/platform/place.h"
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namespace paddle {
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namespace operators {
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using framework::Tensor;
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using platform::DeviceContext;
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#define CUDA_1D_KERNEL_LOOP(i, n) \
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for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < (n); \
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i += blockDim.x * gridDim.x)
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template <typename T>
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__global__ void GatherCUDAKernel(const T* params, const int* indices, T* output,
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size_t index_size, size_t slice_size) {
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CUDA_1D_KERNEL_LOOP(i, index_size * slice_size) {
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int indices_i = i / slice_size;
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int slice_i = i - indices_i * slice_size; // offset inside the slice
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int gather_i = indices[indices_i];
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int params_i = gather_i * slice_size + slice_i;
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*(output + i) = *(params + params_i);
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}
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}
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/**
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* A thin wrapper on gpu tensor
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* Return a new tensor from source tensor, gathered according to index
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* input[src]: type-T source Tensor
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* input[index]: type-int index Tensor (1-D)
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* return: output tensor
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*/
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template <typename T>
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void GPUGather(const platform::DeviceContext& ctx, const Tensor& src,
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const Tensor& index, Tensor* output) {
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// PADDLE_ENFORCE(platform::is_gpu_place(place));
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// check index of shape 1-D
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PADDLE_ENFORCE(index.dims().size() == 1 ||
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(index.dims().size() == 2 && index.dims()[1] == 1));
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int index_size = index.dims()[0];
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auto src_dims = src.dims();
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framework::DDim output_dims(src_dims);
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output_dims[0] = index_size;
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// slice size
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int slice_size = 1;
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for (int i = 1; i < src_dims.size(); ++i) slice_size *= src_dims[i];
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const T* p_src = src.data<T>();
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const int* p_index = index.data<int>();
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T* p_output = output->data<T>();
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int block = 512;
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int n = slice_size * index_size;
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int grid = (n + block - 1) / block;
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GatherCUDAKernel<T><<<
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grid, block, 0,
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reinterpret_cast<const platform::CUDADeviceContext&>(ctx).stream()>>>(
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p_src, p_index, p_output, index_size, slice_size);
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}
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} // namespace operators
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} // namespace paddle
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