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174 lines
6.3 KiB
174 lines
6.3 KiB
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserve.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/operators/pool_cudnn_op.h"
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#include "paddle/platform/cudnn_helper.h"
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namespace paddle {
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namespace operators {
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using Tensor = framework::Tensor;
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using ScopedTensorDescriptor = platform::ScopedTensorDescriptor;
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using ScopedPoolingDescriptor = platform::ScopedPoolingDescriptor;
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using DataLayout = platform::DataLayout;
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using PoolingMode = platform::PoolingMode;
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template <typename T>
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class PoolCudnnOpKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"It must use GPUPlace.");
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const Tensor *input = ctx.Input<Tensor>("X");
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Tensor *output = ctx.Output<Tensor>("Out");
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const T *input_data = input->data<T>();
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T *output_data = output->mutable_data<T>(ctx.GetPlace());
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std::string pooling_type = ctx.Attr<std::string>("pooling_type");
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std::vector<int> ksize = ctx.Attr<std::vector<int>>("ksize");
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std::vector<int> strides = ctx.Attr<std::vector<int>>("strides");
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std::vector<int> paddings = ctx.Attr<std::vector<int>>("paddings");
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if (ctx.Attr<bool>("global_pooling")) {
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for (size_t i = 0; i < ksize.size(); ++i) {
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paddings[i] = 0;
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ksize[i] = static_cast<int>(input->dims()[i + 2]);
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}
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}
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// ------------------- cudnn descriptors ---------------------
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ScopedTensorDescriptor input_desc;
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ScopedTensorDescriptor output_desc;
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ScopedPoolingDescriptor pool_desc;
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DataLayout layout;
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if (strides.size() == 2U) {
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layout = DataLayout::kNCHW;
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} else {
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layout = DataLayout::kNCDHW;
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}
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cudnnTensorDescriptor_t cudnn_input_desc = input_desc.descriptor<T>(
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layout, framework::vectorize2int(input->dims()));
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cudnnTensorDescriptor_t cudnn_output_desc = output_desc.descriptor<T>(
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layout, framework::vectorize2int(output->dims()));
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PoolingMode pooling_mode;
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if (pooling_type == "max") {
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pooling_mode = PoolingMode::kMaximum;
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} else {
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pooling_mode = PoolingMode::kAverage;
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}
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cudnnPoolingDescriptor_t cudnn_pool_desc =
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pool_desc.descriptor(pooling_mode, ksize, paddings, strides);
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// ------------------- cudnn pool algorithm ---------------------
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auto handle = ctx.cuda_device_context().cudnn_handle();
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T alpha = 1.0f, beta = 0.0f;
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PADDLE_ENFORCE(platform::dynload::cudnnPoolingForward(
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handle, cudnn_pool_desc, &alpha, cudnn_input_desc, input_data, &beta,
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cudnn_output_desc, output_data));
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}
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};
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template <typename T>
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class PoolCudnnGradOpKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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PADDLE_ENFORCE(platform::is_gpu_place(ctx.GetPlace()),
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"It must use GPUPlace.");
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const Tensor *input = ctx.Input<Tensor>("X");
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const Tensor *output = ctx.Input<Tensor>("Out");
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const Tensor *output_grad =
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ctx.Input<Tensor>(framework::GradVarName("Out"));
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Tensor *input_grad = ctx.Output<Tensor>(framework::GradVarName("X"));
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std::string pooling_type = ctx.Attr<std::string>("pooling_type");
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std::vector<int> ksize = ctx.Attr<std::vector<int>>("ksize");
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std::vector<int> strides = ctx.Attr<std::vector<int>>("strides");
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std::vector<int> paddings = ctx.Attr<std::vector<int>>("paddings");
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if (ctx.Attr<bool>("global_pooling")) {
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for (size_t i = 0; i < ksize.size(); ++i) {
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paddings[i] = 0;
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ksize[i] = static_cast<int>(input->dims()[i + 2]);
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}
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}
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const T *input_data = input->data<T>();
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const T *output_data = output->data<T>();
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const T *output_grad_data = output_grad->data<T>();
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// ------------------- cudnn descriptors ---------------------
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ScopedTensorDescriptor input_desc;
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ScopedTensorDescriptor output_desc;
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ScopedPoolingDescriptor pool_desc;
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DataLayout layout;
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if (strides.size() == 2U) {
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layout = DataLayout::kNCHW;
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} else {
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layout = DataLayout::kNCDHW;
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}
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cudnnTensorDescriptor_t cudnn_input_desc = input_desc.descriptor<T>(
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layout, framework::vectorize2int(input->dims()));
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cudnnTensorDescriptor_t cudnn_output_desc = output_desc.descriptor<T>(
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layout, framework::vectorize2int(output->dims()));
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PoolingMode pooling_mode;
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if (pooling_type == "max") {
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pooling_mode = PoolingMode::kMaximum;
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} else {
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pooling_mode = PoolingMode::kAverage;
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}
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cudnnPoolingDescriptor_t cudnn_pool_desc =
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pool_desc.descriptor(pooling_mode, ksize, paddings, strides);
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// ------------------- cudnn pool algorithm ---------------------
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auto handle = ctx.cuda_device_context().cudnn_handle();
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T alpha = 1.0f, beta = 0.0f;
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if (input_grad) {
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T *input_grad_data = input_grad->mutable_data<T>(ctx.GetPlace());
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// Because beta is zero, it is unnecessary to reset input_grad.
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PADDLE_ENFORCE(platform::dynload::cudnnPoolingBackward(
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handle, cudnn_pool_desc, &alpha, cudnn_output_desc, output_data,
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cudnn_output_desc, output_grad_data, cudnn_input_desc, input_data,
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&beta, cudnn_input_desc, input_grad_data));
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}
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OP_GPU_KERNEL(pool2d_cudnn, ops::PoolCudnnOpKernel<float>,
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ops::PoolCudnnOpKernel<double>);
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REGISTER_OP_GPU_KERNEL(pool2d_cudnn_grad, ops::PoolCudnnGradOpKernel<float>,
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ops::PoolCudnnGradOpKernel<double>);
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REGISTER_OP_GPU_KERNEL(pool3d_cudnn, ops::PoolCudnnOpKernel<float>,
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ops::PoolCudnnOpKernel<double>);
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REGISTER_OP_GPU_KERNEL(pool3d_cudnn_grad, ops::PoolCudnnGradOpKernel<float>,
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ops::PoolCudnnGradOpKernel<double>);
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