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210 lines
6.9 KiB
210 lines
6.9 KiB
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#pragma once
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#include <cuda.h>
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// NOTE(): support float16 to half in header file.
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#define PADDLE_CUDA_FP16
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#include <cuda_fp16.h>
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#include "paddle/fluid/platform/complex128.h"
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#include "paddle/fluid/platform/complex64.h"
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#include "paddle/fluid/platform/float16.h"
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namespace paddle {
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namespace platform {
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#if CUDA_VERSION < 9000
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#define CREATE_SHFL_MASK(mask, predicate) mask = 0u;
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#else
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#define FULL_WARP_MASK 0xFFFFFFFF
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#define CREATE_SHFL_MASK(mask, predicate) \
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mask = __ballot_sync(FULL_WARP_MASK, (predicate))
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#endif
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inline static int RoundToPowerOfTwo(int dim) {
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if (dim > 512) {
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return 1024;
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} else if (dim > 256) {
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return 512;
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} else if (dim > 128) {
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return 256;
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} else if (dim > 64) {
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return 128;
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} else if (dim > 32) {
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return 64;
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} else {
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return 32;
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}
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}
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#define CUDA_LAUNCH_KERNEL_BASE(dim, ...) \
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case (dim): { \
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constexpr auto kPowerOfTwoDim = (dim); \
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__VA_ARGS__; \
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} break
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#define CUDA_LAUNCH_KERNEL_HELPER(...) \
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CUDA_LAUNCH_KERNEL_BASE(1024, ##__VA_ARGS__); \
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CUDA_LAUNCH_KERNEL_BASE(512, ##__VA_ARGS__); \
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CUDA_LAUNCH_KERNEL_BASE(256, ##__VA_ARGS__); \
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CUDA_LAUNCH_KERNEL_BASE(128, ##__VA_ARGS__); \
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CUDA_LAUNCH_KERNEL_BASE(64, ##__VA_ARGS__); \
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CUDA_LAUNCH_KERNEL_BASE(32, ##__VA_ARGS__);
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template <typename T>
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__forceinline__ __device__ T CudaShuffleDownSync(unsigned mask, T val,
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int delta,
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int width = warpSize) {
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#if CUDA_VERSION < 9000
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return __shfl_down(val, delta, width);
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#else
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return __shfl_down_sync(mask, val, static_cast<unsigned>(delta), width);
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#endif
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}
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template <typename T>
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__forceinline__ __device__ T CudaShuffleXorSync(unsigned mask, T val,
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int width = warpSize) {
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#if CUDA_VERSION < 9000
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return __shfl_xor(val, width);
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#else
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return __shfl_xor_sync(mask, val, width);
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#endif
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}
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// CUDA 9.0 have native compatible float16 shfl_down
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#if CUDA_VERSION < 9000
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template <>
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__forceinline__ __device__ float16 CudaShuffleDownSync(unsigned mask,
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float16 val, int delta,
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int width) {
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return float16(
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__shfl_down(static_cast<half>(val), static_cast<unsigned>(delta), width));
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}
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template <>
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__forceinline__ __device__ float16 CudaShuffleXorSync(unsigned mask,
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float16 val, int width) {
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return float16(__shfl_xor(static_cast<half>(val), width));
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}
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#else
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template <>
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__forceinline__ __device__ float16 CudaShuffleDownSync(unsigned mask,
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float16 val, int delta,
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int width) {
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return float16(__shfl_down_sync(mask, static_cast<half>(val),
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static_cast<unsigned>(delta), width));
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}
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template <>
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__forceinline__ __device__ paddle::platform::complex64 CudaShuffleDownSync(
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unsigned mask, paddle::platform::complex64 val, int delta, int width) {
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float real = static_cast<float>(__shfl_down_sync(
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mask, static_cast<float>(val.real), static_cast<unsigned>(delta), width));
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float imag = static_cast<float>(__shfl_down_sync(
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mask, static_cast<float>(val.imag), static_cast<unsigned>(delta), width));
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return paddle::platform::complex64(real, imag);
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}
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template <>
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__forceinline__ __device__ paddle::platform::complex128 CudaShuffleDownSync(
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unsigned mask, paddle::platform::complex128 val, int delta, int width) {
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double real = static_cast<double>(
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__shfl_down_sync(mask, static_cast<double>(val.real),
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static_cast<unsigned>(delta), width));
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double imag = static_cast<double>(
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__shfl_down_sync(mask, static_cast<double>(val.imag),
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static_cast<unsigned>(delta), width));
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return paddle::platform::complex128(real, imag);
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}
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template <>
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__forceinline__ __device__ float16 CudaShuffleXorSync(unsigned mask,
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float16 val, int width) {
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return float16(__shfl_xor_sync(mask, static_cast<half>(val), width));
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}
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template <>
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__forceinline__ __device__ paddle::platform::complex64 CudaShuffleXorSync(
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unsigned mask, paddle::platform::complex64 val, int width) {
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float real = static_cast<float>(
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__shfl_xor_sync(mask, static_cast<float>(val.real), width));
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float imag = static_cast<float>(
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__shfl_xor_sync(mask, static_cast<float>(val.imag), width));
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return paddle::platform::complex64(real, imag);
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}
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template <>
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__forceinline__ __device__ paddle::platform::complex128 CudaShuffleXorSync(
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unsigned mask, paddle::platform::complex128 val, int width) {
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double real = static_cast<double>(
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__shfl_xor_sync(mask, static_cast<double>(val.real), width));
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double imag = static_cast<double>(
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__shfl_xor_sync(mask, static_cast<double>(val.imag), width));
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return paddle::platform::complex128(real, imag);
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}
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#endif
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template <typename T>
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__forceinline__ __device__ T CudaShuffleSync(unsigned mask, T val, int src_line,
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int width = 32) {
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#if CUDA_VERSION < 9000
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return __shfl(val, src_line, width);
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#else
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return __shfl_sync(mask, val, src_line, width);
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#endif
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}
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template <typename T>
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HOSTDEVICE T Infinity() {
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return INFINITY;
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}
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template <typename T>
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__device__ T reduceSum(T val, int tid, int len) {
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// NOTE(zcd): The warp size should be taken from the
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// parameters of the GPU but not specified as 32 simply.
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// To make the reduceSum more efficiently,
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// I use Warp-Level Parallelism and assume the Warp size
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// is 32 which may be different for different GPU,
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// but most card's warp size is 32.
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const int warpSize = 32;
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__shared__ T shm[warpSize];
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unsigned mask = 0u;
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CREATE_SHFL_MASK(mask, tid < len);
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for (int offset = warpSize / 2; offset > 0; offset /= 2)
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val += platform::CudaShuffleDownSync(mask, val, offset);
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if (tid < warpSize) shm[tid] = 0;
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__syncthreads();
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if (tid % warpSize == 0) {
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shm[tid / warpSize] = val;
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}
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__syncthreads();
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CREATE_SHFL_MASK(mask, tid < warpSize);
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if (tid < warpSize) {
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val = shm[tid];
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for (int offset = warpSize / 2; offset > 0; offset /= 2)
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val += platform::CudaShuffleDownSync(mask, val, offset);
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}
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return val;
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}
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} // namespace platform
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} // namespace paddle
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