zhangxiaokun
|
4793969fce
|
Add UT
|
4 years ago |
|
zhangxiaokun
|
aaf496e02a
|
Delete repeated rtSetDevice
|
4 years ago |
|
zhangxiaokun
|
1695f5df6a
|
Add coverage option
|
4 years ago |
wjm
|
b481866887
|
fix ut
|
4 years ago |
lianghao24@hisilicon.com
|
35bc98c540
|
hcomrecieve
|
4 years ago |
mindspore-ci-bot
|
e4d892cbda
|
!1041 set weight compress for original operators
From: @li-lei0106
Reviewed-by: @ni100die,@xchu42,@j00107162
Signed-off-by:
|
4 years ago |
|
zhangxiaokun
|
7b84e7ed33
|
Enable -Werror=format from UT
|
4 years ago |
|
zhangxiaokun
|
853e611357
|
Enable -Werror=format from UT
|
4 years ago |
李磊
|
780041ae65
|
set weight compress for original operators
|
4 years ago |
|
mindspore-ci-bot
|
2c0adfc091
|
!1068 dts: model load data modify
From: @zhengyuanhua
Reviewed-by: @liujunzhu,@youui
Signed-off-by: @youui
|
4 years ago |
zhengyuanhua
|
cb273bef08
|
dts: model load data modify
|
4 years ago |
|
mindspore-ci-bot
|
c88506106e
|
!936 set AiCoreNum in options
From: @HW_KK
Reviewed-by:
Signed-off-by:
|
4 years ago |
wuweikang
|
e77925035a
|
set AiCoreNum in options
|
4 years ago |
|
mindspore-ci-bot
|
b4206b9fe3
|
!1063 Fix bug of aicpu all_shape compile.
From: @zhao_zhixuan
Reviewed-by: @xchu42,@ji_chen
Signed-off-by: @ji_chen
|
4 years ago |
unknown
|
4b421a4c18
|
Fix bug of aicpu all_shape compile.
|
4 years ago |
|
unknown
|
edd784700f
|
Fix bug of aicpu all_shape compile.
|
4 years ago |
taoxudonghaha
|
776317e647
|
modify omg_stub.cc
|
4 years ago |
|
taoxudonghaha
|
82097619ba
|
ignore some ut case
|
4 years ago |
|
unknown
|
b9fd09661e
|
Fix bug of aicpu all_shape compile.
|
4 years ago |
|
unknown
|
3b8c0cb05f
|
Fix bug of aicpu all_shape compile.
|
4 years ago |
zhou_lili
|
9779ab5943
|
fix mdc mbuf_list order error
|
4 years ago |
|
mindspore-ci-bot
|
0fcdd69e23
|
!1048 add ut
From: @lichun30
Reviewed-by: @xchu42,@wqtshg
Signed-off-by: @wqtshg
|
4 years ago |
|
mindspore-ci-bot
|
67eddb6ef5
|
!1043 Enable rtLabelCreateExV2
From: @zhangxiaokun9
Reviewed-by: @wangxiaotian22,@ji_chen
Signed-off-by: @ji_chen
|
4 years ago |
lichun
|
c82d7e2fa3
|
add ut
|
4 years ago |
|
zhangxiaokun
|
17f05b9e81
|
Add UT for rtLabelCreateExV2
|
4 years ago |
|
zhangxiaokun
|
6eeed0e394
|
Add rtLabelCreateExV2 stub
|
4 years ago |
|
zhangxiaokun
|
5f6f7f23d8
|
Add rtLabelCreateV2 stub
|
4 years ago |
|
unknown
|
227571fc75
|
multi_task for single_op.
|
4 years ago |
|
mindspore-ci-bot
|
c179d990ea
|
!1016 For aicpu all_shape compile.
From: @zhao_zhixuan
Reviewed-by: @xchu42,@ji_chen
Signed-off-by: @ji_chen
|
4 years ago |
|
mindspore-ci-bot
|
4b121f23df
|
!1015 move hccl_memcpy_pass back to preprocess
From: @wangxiaotian22
Reviewed-by: @xchu42,@sheng-nan
Signed-off-by: @ji_chen
|
4 years ago |
wangxiaotian22
|
5cdca396f0
|
move hccl_memcpy_pass back to preprocess
|
4 years ago |
|
unknown
|
e331dee2b9
|
Fix ut.
|
4 years ago |
|
unknown
|
975dddc0d5
|
For aicpu all_shape compile.
|
4 years ago |
|
mindspore-ci-bot
|
e01821f7b6
|
!987 rectify error codes
From: @lichun30
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
zhangxiaokun
|
f18bb48087
|
Fix printf like format
|
4 years ago |
|
lichun
|
9d21f83938
|
rectify error codes
|
4 years ago |
|
wangxiaotian22
|
048f335d99
|
fix ut
|
4 years ago |
|
wangxiaotian22
|
9e324f4d89
|
mod ut
|
4 years ago |
|
lichun
|
c60947c203
|
rectify error codes
|
4 years ago |
|
lichun
|
50bba4dabd
|
rectify error codes
|
4 years ago |
|
lichun
|
2249f2804f
|
rectify error codes
|
4 years ago |
zhaoxinxin
|
b411d7d7ba
|
modified: tests/ut/ge/graph/load/new_model_manager_model_manager_unittest.cc
|
4 years ago |
|
zhaoxinxin
|
c08216f296
|
modified: ge/graph/load/model_manager/model_manager.cc
modified: ge/graph/preprocess/graph_preprocess.cc
modified: tests/ut/ge/CMakeLists.txt
modified: tests/ut/ge/graph/load/new_model_manager_model_manager_unittest.cc
new file: tests/ut/ge/graph/preprocess/graph_preprocess_unittest.cc
|
4 years ago |
|
zhangxiaokun
|
c193588e2f
|
Rename new_model_manager to model_manager.
|
4 years ago |
chenyemeng
|
a3114f023d
|
cache support
|
4 years ago |
|
zhou_lili
|
d75417c9d4
|
action of remove const data has be done by
subgraph_const_migration_pass.cc
|
4 years ago |
|
mindspore-ci-bot
|
bc0fd616c4
|
!948 session_id_pid_prefix
From: @wangxiaotian22
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
wangxiaotian22
|
ebe407e79f
|
gensessionid add pid prefix
|
4 years ago |
|
zhou_lili
|
0db227b67f
|
add check of ut
|
4 years ago |
|
zhou_lili
|
8ad9ea921a
|
add check of ut
|
4 years ago |
|
mindspore-ci-bot
|
ab736fc748
|
!895 add fuse same data pass for online infer dynamic dims
From: @zhou_lili
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
zhou_lili
|
6f10a03c59
|
fix infer time and mem when online infer dynamic
|
4 years ago |
|
mindspore-ci-bot
|
d4adceee5c
|
!823 Add submodelId in dynamic shape
From: @taoxiangdong
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
mindspore-ci-bot
|
09e5439215
|
!880 Eliminate variable_op_list_
From: @zhangxiaokun9
Reviewed-by: @wangxiaotian22,@xchu42
Signed-off-by: @ji_chen
|
4 years ago |
|
zhangxiaokun
|
2e34ed1acd
|
Fix UT
|
4 years ago |
|
zhangxiaokun
|
501111b020
|
Eliminate variable_op_list_
|
4 years ago |
|
zhangxiaokun
|
b0cbef78fc
|
Eliminate variable_op_list_
|
4 years ago |
|
chenyemeng
|
668457ec9c
|
Fix UT
|
4 years ago |
|
zhangxiaokun
|
3ae1554141
|
Eliminate variable_op_list_
|
4 years ago |
|
chenyemeng
|
0ad4302f4e
|
rm compile macro
|
4 years ago |
|
chenyemeng
|
46ea5518d1
|
rm compile macro
|
4 years ago |
|
chenyemeng
|
04105fb40f
|
rm compile macro
|
4 years ago |
|
chenyemeng
|
be2a31e228
|
rm macro
|
4 years ago |
|
chenyemeng
|
f95efe48a3
|
rm compile macro
|
4 years ago |
|
zhangxiaokun
|
6ce14620cc
|
Eliminate data_op_list_
|
4 years ago |
|
zhou_lili
|
dd6996e2e9
|
change switchn to case and add ut
|
4 years ago |
|
mindspore-ci-bot
|
6009e647a7
|
!836 Custom pass register.
From: @zhao_zhixuan
Reviewed-by: @sheng-nan
Signed-off-by:
|
4 years ago |
|
mindspore-ci-bot
|
84b53f3f99
|
!842 Fix dynamic GetNext
From: @zhangxiaokun9
Reviewed-by: @wqtshg,@wangxiaotian22,@xchu42,@ji_chen
Signed-off-by: @ji_chen
|
4 years ago |
|
zhangxiaokun
|
5bedbf9696
|
Add UT
|
4 years ago |
|
mindspore-ci-bot
|
12dcf84615
|
!818 Memory optimization during model loading
From: @li-lei0106
Reviewed-by: @ji_chen,@xchu42
Signed-off-by: @ji_chen
|
4 years ago |
taoxiangdong
|
06499aaf2f
|
add submodel id in dynamic shape
|
4 years ago |
|
unknown
|
af230762e1
|
Custom pass register.
|
4 years ago |
|
mindspore-ci-bot
|
8c222e4cb5
|
!808 Free mem before return
From: @taoxiangdong
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
wangxiaotian22
|
6d94878eaf
|
fix ut
|
4 years ago |
|
wangxiaotian22
|
610828561c
|
fill ut
|
4 years ago |
|
taoxiangdong
|
7d336c66a6
|
Free memory before return
|
4 years ago |
|
lwx897429
|
e0a5b21daa
|
Memory optimization during model loading
|
4 years ago |
|
mindspore-ci-bot
|
7b90d6ed56
|
!814 add macro
From: @chen_yemeng
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
mindspore-ci-bot
|
c8ceb4b8fc
|
!812 Feature:display model info
From: @wangwenhua1
Reviewed-by: @xchu42,@ji_chen
Signed-off-by: @ji_chen
|
4 years ago |
|
chenyemeng
|
ef922e7c00
|
add macro
|
4 years ago |
|
chenyemeng
|
c47a89e236
|
add macro
|
4 years ago |
|
chenyemeng
|
f9b4ae65fc
|
add macro
|
4 years ago |
|
chenyemeng
|
3f610d914b
|
add macro
|
4 years ago |
|
chenyemeng
|
f5bca22f53
|
add macro
|
4 years ago |
|
chenyemeng
|
d986f9aa5e
|
add macro
|
4 years ago |
|
zhangxiaokun
|
c22b0ebe9f
|
Eliminate output_op_list_
|
4 years ago |
wangwenhua1@huawei.com
|
e3063461eb
|
display model info
|
4 years ago |
|
mindspore-ci-bot
|
b65e4eb25f
|
!772 GeTensor aligned addr & zero copy support
From: @chen_yemeng
Reviewed-by: @sheng-nan,@wqtshg
Signed-off-by: @wqtshg
|
4 years ago |
|
mindspore-ci-bot
|
bc193c83fc
|
!754 Parse training trace switch in profstart
From: @taoxiangdong
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
mindspore-ci-bot
|
e15e2d9378
|
!773 broadcast in train graph related
From: @wangxiaotian22
Reviewed-by:
Signed-off-by:
|
4 years ago |
|
wangwenhua1@huawei.com
|
f594b6370b
|
display model info
|
4 years ago |
weiyang
|
6cf3a44a9f
|
dynamic shape
|
4 years ago |
|
wangxiaotian22
|
dacc0a16a1
|
fix ut fail
|
4 years ago |
|
wangxiaotian22
|
a0abc42abf
|
fix ut compile
|
4 years ago |
|
mindspore-ci-bot
|
0996fda674
|
!750 Add SetIoAddrs for UpdateArgs.
From: @zhangxiaokun9
Reviewed-by: @wangxiaotian22,@xchu42,@wangxiaotian22,@xchu42
Signed-off-by: @ji_chen
|
4 years ago |
|
taoxiangdong
|
e28e839127
|
Parse training trace switch in profstart
|
4 years ago |
|
wangwenhua1@huawei.com
|
58e1526e1f
|
display model info
|
4 years ago |
|
chenyemeng
|
861c0ee1bb
|
GeTensor aligned addr & zero copy support
|
4 years ago |
|
chenyemeng
|
90a49838f8
|
revert pr 689
|
4 years ago |
|
wangwenhua1@huawei.com
|
210ee03cd5
|
display model info
|
4 years ago |
