xuanyue
5 years ago
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[查看中文](./README_CN.md)
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## What Is MindSpore Lite
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MindSpore lite is a high-performance, lightweight open source reasoning framework that can be used to meet the needs of AI applications on mobile devices. MindSpore Lite focuses on how to deploy AI technology more effectively on devices. It has been integrated into HMS (Huawei Mobile Services) to provide inferences for applications such as image classification, object detection and OCR. MindSpore Lite will promote the development and enrichment of the AI software/hardware application ecosystem.
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<img src="../../docs/MindSpore-Lite-architecture.png" alt="MindSpore Lite Architecture" width="600"/>
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For more details please check out our [MindSpore Lite Architecture Guide](https://www.mindspore.cn/lite/docs/en/master/architecture.html).
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### MindSpore Lite features
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1. Cooperative work with MindSpore training
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- Provides training, optimization, and deployment.
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- The unified IR realizes the device-cloud AI application integration.
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2. Lightweight
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- Provides model compress, which could help to improve performance as well.
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- Provides the ultra-lightweight reasoning solution MindSpore Micro to meet the deployment requirements in extreme environments such as smart watches and headphones.
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3. High-performance
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- The built-in high-performance kernel computing library NNACL supports multiple convolution optimization algorithms such as Slide window, im2col+gemm, winograde, etc.
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- Assembly code to improve performance of kernel operators. Supports CPU, GPU, and NPU.
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4. Versatility
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- Supports IOS, Android.
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- Supports Lite OS.
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- Supports mobile device, smart screen, pad, and IOT devices.
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- Supports third party models such as TFLite, CAFFE and ONNX.
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## MindSpore Lite AI deployment procedure
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1. Model selection and personalized training
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Select a new model or use an existing model for incremental training using labeled data. When designing a model for mobile device, it is necessary to consider the model size, accuracy and calculation amount.
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The MindSpore team provides a series of pre-training models used for image classification, object detection. You can use these pre-trained models in your application.
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The pre-trained models provided by MindSpore include: [Image Classification](https://download.mindspore.cn/model_zoo/official/lite/) and [Object Detection](https://download.mindspore.cn/model_zoo/official/lite/). More models will be provided in the feature.
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MindSpore allows you to retrain pre-trained models to perform other tasks. For example: using a pre-trained image classification model, it can be retrained to recognize new image types. See [Retraining](https://www.mindspore.cn/lite/tutorial/zh-CN/master/advanced_use/retraining_of_quantized_network.html).
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2. Model converter and optimization
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If you use MindSpore or a third-party model, you need to use [MindSpore Lite Model Converter Tool](https://www.mindspore.cn/lite/tutorial/zh-CN/master/use/converter_tool.html) to convert the model into MindSpore Lite model. The MindSpore Lite model converter tool provides the converter of TensorFlow Lite, Caffe, ONNX to MindSpore Lite model, fusion and quantization could be introduced during convert procedure.
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MindSpore also provides a tool to convert models running on IoT devices .
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3. Model deployment
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This stage mainly realizes model deployment, including model management, deployment, operation and maintenance monitoring, etc.
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4. Inference
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Load the model and perform inference. [Inference](https://www.mindspore.cn/lite/tutorial/zh-CN/master/use/runtime.html) is the process of running input data through the model to get output.
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MindSpore provides a series of pre-trained models that can be deployed on mobile device [example](#TODO).
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@ -0,0 +1,169 @@
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#ifdef __aarch64__
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.text
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.align 5
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.global ConvDwInt8PostAlign4
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#ifndef __APPLE__
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.type ConvDwInt8PostAlign4, %function
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#endif
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// void ConvDwInt8PostAlign4(int8_t *dst, int32_t *buffer, int num_pixels, int32_t output_zp, int32_t out_multiplier,
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// int32_t left_shift, int32_t right_shift, int32_t acc_min, int32_t acc_max);
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// x0: dst, x1: buffer, x2: num_pixels, x3: output_zp, x4: out_multiplier,
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// x5: left_shift, x6: right_shift, x7: acc_min, x8: acc_max
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ConvDwInt8PostAlign4:
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// registers v8 ~ v15 must be preserved by a callee across subroutine calls, according to
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// https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#simd-and-floating-point-registers
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// x19 ~ x29 should be also preserved
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// whereas our coding style do not permit such amount of parameters
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ldr x8, [sp]
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dup v26.4s, w5
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dup v27.4s, w4
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dup v28.4s, w6
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dup v29.4s, w3
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dup v30.4s, w7
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dup v31.4s, w8
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cmp x2, 16
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blt LoopDepth8
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LoopDepth16:
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ld1 {v0.4s}, [x1], #16
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ld1 {v1.4s}, [x1], #16
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ld1 {v2.4s}, [x1], #16
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ld1 {v3.4s}, [x1], #16
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sqshl v0.4s, v0.4s, v26.4s
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sqshl v1.4s, v1.4s, v26.4s
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sqshl v2.4s, v2.4s, v26.4s
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sqshl v3.4s, v3.4s, v26.4s
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sqrdmulh v0.4s, v0.4s, v27.4s
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sqrdmulh v1.4s, v1.4s, v27.4s
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sqrdmulh v2.4s, v2.4s, v27.4s
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sqrdmulh v3.4s, v3.4s, v27.4s
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and v16.16b, v28.16b, v0.16b
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sshr v16.4s, v16.4s, #31
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sqadd v0.4s, v0.4s, v16.4s
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srshl v0.4s, v0.4s, v28.4s
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and v17.16b, v28.16b, v1.16b
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sshr v17.4s, v17.4s, #31
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sqadd v1.4s, v1.4s, v17.4s
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srshl v1.4s, v1.4s, v28.4s
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and v18.16b, v28.16b, v2.16b
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sshr v18.4s, v18.4s, #31
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sqadd v2.4s, v2.4s, v18.4s
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srshl v2.4s, v2.4s, v28.4s
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and v19.16b, v28.16b, v3.16b
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sshr v19.4s, v19.4s, #31
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sqadd v3.4s, v3.4s, v19.4s
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srshl v3.4s, v3.4s, v28.4s
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add v0.4s, v0.4s, v29.4s
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add v1.4s, v1.4s, v29.4s
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add v2.4s, v2.4s, v29.4s
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add v3.4s, v3.4s, v29.4s
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smax v0.4s, v0.4s, v30.4s
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smax v1.4s, v1.4s, v30.4s
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smax v2.4s, v2.4s, v30.4s
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smax v3.4s, v3.4s, v30.4s
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smin v0.4s, v0.4s, v31.4s
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smin v1.4s, v1.4s, v31.4s
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smin v2.4s, v2.4s, v31.4s
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smin v3.4s, v3.4s, v31.4s
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sqxtn v0.4h, v0.4s
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sqxtn v1.4h, v1.4s
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sqxtn v2.4h, v2.4s
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sqxtn v3.4h, v3.4s
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sqxtn v0.8b, v0.8h
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sqxtn v1.8b, v1.8h
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sqxtn v2.8b, v2.8h
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sqxtn v3.8b, v3.8h
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st1 {v0.s}[0], [x0], #4
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st1 {v1.s}[0], [x0], #4
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st1 {v2.s}[0], [x0], #4
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st1 {v3.s}[0], [x0], #4
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sub x2, x2, #16
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cmp x2, #16
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bge LoopDepth16
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LoopDepth8:
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cmp x2, #8
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blt LoopDepth4
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ld1 {v0.4s}, [x1], #16
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ld1 {v1.4s}, [x1], #16
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sqshl v0.4s, v0.4s, v26.4s
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sqshl v1.4s, v1.4s, v26.4s
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sqrdmulh v0.4s, v0.4s, v27.4s
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sqrdmulh v1.4s, v1.4s, v27.4s
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and v16.16b, v28.16b, v0.16b
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sshr v16.4s, v16.4s, #31
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sqadd v0.4s, v0.4s, v16.4s
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srshl v0.4s, v0.4s, v28.4s
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and v17.16b, v28.16b, v1.16b
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sshr v17.4s, v17.4s, #31
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sqadd v1.4s, v1.4s, v17.4s
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srshl v1.4s, v1.4s, v28.4s
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add v0.4s, v0.4s, v29.4s
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add v1.4s, v1.4s, v29.4s
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smax v0.4s, v0.4s, v30.4s
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smax v1.4s, v1.4s, v30.4s
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smin v0.4s, v0.4s, v31.4s
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smin v1.4s, v1.4s, v31.4s
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sqxtn v0.4h, v0.4s
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sqxtn v1.4h, v1.4s
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sqxtn v0.8b, v0.8h
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sqxtn v1.8b, v1.8h
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st1 {v0.s}[0], [x0], #4
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st1 {v1.s}[0], [x0], #4
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sub x2, x2, #8
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cmp x2, #8
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bge LoopDepth8
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LoopDepth4:
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cmp x2, #4
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blt End
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ld1 {v0.4s}, [x1], #16
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sqshl v0.4s, v0.4s, v26.4s
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sqrdmulh v0.4s, v0.4s, v27.4s
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and v16.16b, v28.16b, v0.16b
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sshr v16.4s, v16.4s, #31
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sqadd v0.4s, v0.4s, v16.4s
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srshl v0.4s, v0.4s, v28.4s
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add v0.4s, v0.4s, v29.4s
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smax v0.4s, v0.4s, v30.4s
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smin v0.4s, v0.4s, v31.4s
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sqxtn v0.4h, v0.4s
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sqxtn v0.8b, v0.8h
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st1 {v0.s}[0], [x0], #4
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sub x2, x2, #4
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bge LoopDepth4
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End:
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ret
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#endif
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