commit
1239cd6135
@ -1,42 +0,0 @@
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/**
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* Copyright 2019 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "kernel/gpu/math/binary_op_gpu_kernel.h"
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namespace mindspore {
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namespace kernel {
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MS_REG_GPU_KERNEL_ONE(
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RealDiv,
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KernelAttr().AddInputAttr(kNumberTypeFloat32).AddInputAttr(kNumberTypeFloat32).AddOutputAttr(kNumberTypeFloat32),
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BinaryOpGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(
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RealDiv,
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KernelAttr().AddInputAttr(kNumberTypeFloat16).AddInputAttr(kNumberTypeFloat16).AddOutputAttr(kNumberTypeFloat16),
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BinaryOpGpuKernel, half)
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MS_REG_GPU_KERNEL_ONE(
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Mul, KernelAttr().AddInputAttr(kNumberTypeFloat32).AddInputAttr(kNumberTypeFloat32).AddOutputAttr(kNumberTypeFloat32),
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BinaryOpGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(
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Mul, KernelAttr().AddInputAttr(kNumberTypeFloat16).AddInputAttr(kNumberTypeFloat16).AddOutputAttr(kNumberTypeFloat16),
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BinaryOpGpuKernel, half)
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MS_REG_GPU_KERNEL_ONE(
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Sub, KernelAttr().AddInputAttr(kNumberTypeFloat32).AddInputAttr(kNumberTypeFloat32).AddOutputAttr(kNumberTypeFloat32),
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BinaryOpGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(
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Sub, KernelAttr().AddInputAttr(kNumberTypeFloat16).AddInputAttr(kNumberTypeFloat16).AddOutputAttr(kNumberTypeFloat16),
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BinaryOpGpuKernel, half)
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} // namespace kernel
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} // namespace mindspore
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@ -1,237 +0,0 @@
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/**
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* Copyright 2019 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_KERNEL_GPU_BINARYOP_GPU_KERNEL_H_
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#define MINDSPORE_CCSRC_KERNEL_GPU_BINARYOP_GPU_KERNEL_H_
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#include <cuda_runtime_api.h>
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#include <vector>
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#include <string>
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#include <map>
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#include "kernel/gpu/gpu_kernel.h"
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#include "kernel/gpu/gpu_kernel_factory.h"
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#include "kernel/gpu/cuda_impl/unary_op_impl.cuh"
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#include "kernel/gpu/kernel_constants.h"
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namespace mindspore {
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namespace kernel {
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enum BinaryOpType { BINARY_OP_ADD = 0, BINARY_OP_SUB, BINARY_OP_MUL, BINARY_OP_DIV, BINARY_OP_INVALID_TYPE = 255 };
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static const std::map<std::string, BinaryOpType> kBinaryOpTypeMap = {
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{"Sub", BINARY_OP_SUB}, {"Mul", BINARY_OP_MUL}, {"RealDiv", BINARY_OP_DIV}};
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template <typename T>
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class BinaryOpGpuKernel : public GpuKernel {
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public:
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BinaryOpGpuKernel()
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: cudnn_handle_(nullptr),
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binary_op_type_(BINARY_OP_INVALID_TYPE),
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tensor_op_(CUDNN_OP_TENSOR_MUL),
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inputA_descriptor_(nullptr),
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inputB_descriptor_(nullptr),
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opTensor_descriptor_(nullptr),
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cudnn_data_type_(CUDNN_DATA_FLOAT),
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is_null_input_(false),
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input_size_(0),
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output_size_(0),
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workspace_size_(0) {}
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~BinaryOpGpuKernel() override { DestroyResource(); }
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const std::vector<size_t> &GetInputSizeList() const override { return input_size_list_; }
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const std::vector<size_t> &GetOutputSizeList() const override { return output_size_list_; }
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const std::vector<size_t> &GetWorkspaceSizeList() const override { return workspace_size_list_; }
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bool Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &workspace,
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const std::vector<AddressPtr> &outputs, uintptr_t stream_ptr) override {
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if (is_null_input_) {
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return true;
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}
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T *input_addr = GetDeviceAddress<T>(inputs, 0);
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T *input_addr2 = GetDeviceAddress<T>(inputs, 1);
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T *output_addr = GetDeviceAddress<T>(outputs, 0);
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const float alpha = 1;
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const float beta = 0;
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T *inputB_addr = nullptr;
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switch (binary_op_type_) {
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case BINARY_OP_SUB: {
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T *workspace_addr = GetDeviceAddress<T>(workspace, 0);
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Negative(input_addr2, workspace_addr, inputs[1]->size / sizeof(T), reinterpret_cast<cudaStream_t>(stream_ptr));
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inputB_addr = workspace_addr;
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break;
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}
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case BINARY_OP_MUL: {
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inputB_addr = input_addr2;
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break;
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}
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case BINARY_OP_DIV: {
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T *workspace_addr = GetDeviceAddress<T>(workspace, 0);
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Reciprocal(input_addr2, workspace_addr, inputs[1]->size / sizeof(T),
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reinterpret_cast<cudaStream_t>(stream_ptr));
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inputB_addr = workspace_addr;
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break;
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}
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default: {
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MS_LOG(EXCEPTION) << "Binary operation " << binary_op_type_ << " is not supported.";
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}
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}
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if (inputs[0]->size > inputs[1]->size) {
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnOpTensor(cudnn_handle_, opTensor_descriptor_, &alpha, inputA_descriptor_, input_addr, &alpha,
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inputB_descriptor_, inputB_addr, &beta, inputA_descriptor_, output_addr),
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"cudnnOpTensor failed");
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} else {
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnOpTensor(cudnn_handle_, opTensor_descriptor_, &alpha, inputB_descriptor_, inputB_addr, &alpha,
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inputA_descriptor_, input_addr, &beta, inputB_descriptor_, output_addr),
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"cudnnOpTensor failed");
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}
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return true;
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}
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bool Init(const CNodePtr &kernel_node) override {
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InitResource();
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cudnn_data_type_ = kCudnnDtypeMap[TypeIdLabel(AnfAlgo::GetInputDeviceDataType(kernel_node, 0))];
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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if (input_num != 2) {
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MS_LOG(ERROR) << "Input number is " << input_num << ", but binary operation needs 2 inputs.";
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return false;
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}
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size_t output_num = AnfAlgo::GetOutputTensorNum(kernel_node);
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if (output_num != 1) {
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MS_LOG(ERROR) << "Output number is " << output_num << ", but binary operation needs 1 output.";
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return false;
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}
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InferBinaryType(kernel_node);
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auto input_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 0);
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auto input_shapeB = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 1);
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auto output_shape = AnfAlgo::GetOutputInferShape(kernel_node, 0);
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if (input_shape != output_shape && input_shapeB != output_shape) {
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MS_LOG(ERROR) << "Double-sided broadcast was not supported in cudnn of cudnnOpTensor:\n"
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"InputA must match the corresponding dimension of the destination tensor outC, and each "
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"dimension of the inputB "
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"must match the corresponding dimension of outC or must be equal to 1.";
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return false;
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}
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is_null_input_ = CHECK_NULL_INPUT(input_shape) || CHECK_NULL_INPUT(input_shapeB);
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if (is_null_input_) {
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MS_LOG(WARNING) << "BinaryOpGpuKernel input is null";
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InitSizeLists();
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return true;
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}
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int shape_n = input_shape.size() < 4 ? 1 : SizeToInt(input_shape[input_shape.size() - 4]);
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int shape_c = input_shape.size() < 3 ? 1 : SizeToInt(input_shape[input_shape.size() - 3]);
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int shape_h = input_shape.size() < 2 ? 1 : SizeToInt(input_shape[input_shape.size() - 2]);
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int shape_w = input_shape.size() == 0 ? 1 : SizeToInt(input_shape[input_shape.size() - 1]);
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnSetTensor4dDescriptor(inputA_descriptor_, CUDNN_TENSOR_NCHW, cudnn_data_type_,
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shape_n, shape_c, shape_h, shape_w),
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"cudnnSetTensor4dDescriptor failed");
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int shapeB_n = input_shapeB.size() < 4 ? 1 : SizeToInt(input_shapeB[input_shapeB.size() - 4]);
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int shapeB_c = input_shapeB.size() < 3 ? 1 : SizeToInt(input_shapeB[input_shapeB.size() - 3]);
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int shapeB_h = input_shapeB.size() < 2 ? 1 : SizeToInt(input_shapeB[input_shapeB.size() - 2]);
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int shapeB_w = input_shapeB.size() == 0 ? 1 : SizeToInt(input_shapeB[input_shapeB.size() - 1]);
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnSetTensor4dDescriptor(inputB_descriptor_, CUDNN_TENSOR_NCHW, cudnn_data_type_,
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shapeB_n, shapeB_c, shapeB_h, shapeB_w),
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"cudnnSetTensor4dDescriptor failed");
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InitSizeLists();
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return true;
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}
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protected:
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void InitResource() override {
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cudnn_handle_ = device::gpu::GPUDeviceManager::GetInstance().GetCudnnHandle();
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateTensorDescriptor(&inputA_descriptor_),
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"cudnnCreateTensorDescriptor failed.");
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateTensorDescriptor(&inputB_descriptor_),
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"cudnnCreateTensorDescriptor failed.");
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateOpTensorDescriptor(&opTensor_descriptor_),
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"cudnnCreateOpTensorDescriptor failed.");
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}
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void InitSizeLists() override {
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if (!is_null_input_) {
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetTensorSizeInBytes(inputA_descriptor_, &input_size_),
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"cudnnGetTensorSizeInBytes failed.");
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input_size_list_.push_back(input_size_);
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetTensorSizeInBytes(inputB_descriptor_, &output_size_),
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"cudnnGetTensorSizeInBytes failed.");
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}
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input_size_list_.push_back(output_size_);
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if (binary_op_type_ == BINARY_OP_DIV || binary_op_type_ == BINARY_OP_SUB) {
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workspace_size_ = output_size_;
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}
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workspace_size_list_.push_back(workspace_size_);
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if (output_size_ > input_size_) {
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output_size_list_.push_back(output_size_);
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} else {
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output_size_list_.push_back(input_size_);
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}
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return;
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}
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private:
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void DestroyResource() noexcept {
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyTensorDescriptor(inputA_descriptor_),
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"cudnnDestroyTensorDescriptor failed.");
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyTensorDescriptor(inputB_descriptor_),
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"cudnnDestroyTensorDescriptor failed.");
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyOpTensorDescriptor(opTensor_descriptor_),
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"cudnnDestroyOpTensorDescriptor failed.");
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}
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void InferBinaryType(const CNodePtr &kernel_node) {
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std::string kernel_name = AnfAlgo::GetCNodeName(kernel_node);
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auto iter = kBinaryOpTypeMap.find(kernel_name);
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if (iter == kBinaryOpTypeMap.end()) {
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MS_LOG(EXCEPTION) << "Binary operation " << kernel_name << " is not supported.";
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} else {
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binary_op_type_ = iter->second;
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}
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switch (binary_op_type_) {
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case BINARY_OP_DIV:
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case BINARY_OP_MUL: {
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tensor_op_ = CUDNN_OP_TENSOR_MUL;
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break;
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}
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case BINARY_OP_SUB: {
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tensor_op_ = CUDNN_OP_TENSOR_ADD;
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break;
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}
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default: {
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MS_LOG(EXCEPTION) << "Binary operation " << binary_op_type_ << " is not supported.";
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}
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}
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnSetOpTensorDescriptor(opTensor_descriptor_, tensor_op_, CUDNN_DATA_FLOAT, CUDNN_NOT_PROPAGATE_NAN),
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"cudnnSetOpTensorDescriptor failed");
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return;
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}
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cudnnHandle_t cudnn_handle_;
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BinaryOpType binary_op_type_;
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cudnnOpTensorOp_t tensor_op_;
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cudnnTensorDescriptor_t inputA_descriptor_;
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cudnnTensorDescriptor_t inputB_descriptor_;
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cudnnOpTensorDescriptor_t opTensor_descriptor_;
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cudnnDataType_t cudnn_data_type_;
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bool is_null_input_;
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size_t input_size_;
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size_t output_size_;
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size_t workspace_size_;
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std::vector<size_t> input_size_list_;
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std::vector<size_t> output_size_list_;
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std::vector<size_t> workspace_size_list_;
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};
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} // namespace kernel
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} // namespace mindspore
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||||
#endif // MINDSPORE_CCSRC_KERNEL_GPU_BINARYOP_GPU_KERNEL_H_
|
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