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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_RANDOM_CHOICE_WITH_MASK_IMPL_CUH_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_RANDOM_CHOICE_WITH_MASK_IMPL_CUH_
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#include <cuda_runtime.h>
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#include <curand_kernel.h>
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#include "runtime/device/gpu/cuda_common.h"
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#define BLOCKSIZE 256
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#define MAX_DIMENSION 5
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template <typename T, typename S>
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void CalRandomChoiceWithMask(const int &input_size, const int &input_shape_size, const int &d1, const int &d2,
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const int &d3, const int &d4, const int &d5, const int &seedc, const int &count,
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const T *input, S *output_index, T *output_mask, S *index_buff, S *mask_buff, S *rank_buff,
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S *Tnum_buff, S *tmp_buff, curandState *globalState, cudaStream_t stream);
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int RcwmRoundUpPower2(int v);
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_RANDOM_CHOICE_WITH_MASK_IMPL_CUH_
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "backend/kernel_compiler/gpu/random/random_choice_with_mask_gpu_kernel.h"
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namespace mindspore {
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namespace kernel {
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MS_REG_GPU_KERNEL_TWO(
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RandomChoiceWithMask,
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KernelAttr().AddInputAttr(kNumberTypeBool).AddOutputAttr(kNumberTypeInt32).AddOutputAttr(kNumberTypeBool),
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RandomChoiceWithMaskGpuKernel, bool, int)
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}
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} // namespace mindspore
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_RANDOM_RANDOM_CHOICE_WITH_MASK_GPU_KERNEL_H_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_RANDOM_RANDOM_CHOICE_WITH_MASK_GPU_KERNEL_H_
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#include <vector>
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#include "backend/kernel_compiler/gpu/gpu_kernel.h"
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#include "backend/kernel_compiler/gpu/gpu_kernel_factory.h"
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#include "backend/kernel_compiler/gpu/cuda_impl/random_choice_with_mask_impl.cuh"
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namespace mindspore {
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namespace kernel {
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template <typename T, typename S>
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class RandomChoiceWithMaskGpuKernel : public GpuKernel {
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public:
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RandomChoiceWithMaskGpuKernel() : input_shape_size_(0), seedc_(0), input_size_(1), count_(0), ceil_power2_(0) {}
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~RandomChoiceWithMaskGpuKernel() override = default;
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const std::vector<size_t> &GetInputSizeList() const override { return input_size_list_; }
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const std::vector<size_t> &GetOutputSizeList() const override { return output_size_list_; }
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const std::vector<size_t> &GetWorkspaceSizeList() const override { return workspace_size_list_; }
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bool Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &workspaces,
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const std::vector<AddressPtr> &outputs, void *stream_ptr) override {
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T *input = GetDeviceAddress<T>(inputs, 0);
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S *output_index = GetDeviceAddress<S>(outputs, 0);
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T *output_mask = GetDeviceAddress<T>(outputs, 1);
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S *index_buff = GetDeviceAddress<S>(workspaces, 0);
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S *mask_buff = GetDeviceAddress<S>(workspaces, 1);
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S *rank_buff = GetDeviceAddress<S>(workspaces, 2);
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S *Tnum_buff = GetDeviceAddress<S>(workspaces, 3);
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S *tmp_buff = GetDeviceAddress<S>(workspaces, 4);
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void *States = GetDeviceAddress<void *>(workspaces, 5);
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curandState *devStates = reinterpret_cast<curandState *>(States);
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CalRandomChoiceWithMask(input_size_, input_shape_size_, input_shape_5D_[0], input_shape_5D_[1], input_shape_5D_[2],
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input_shape_5D_[3], input_shape_5D_[4], seedc_, count_, input, output_index, output_mask,
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index_buff, mask_buff, rank_buff, Tnum_buff, tmp_buff, devStates,
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reinterpret_cast<cudaStream_t>(stream_ptr));
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return true;
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}
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bool Init(const CNodePtr &kernel_node) override {
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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if (input_num != 1) {
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MS_LOG(ERROR) << "Input number is " << input_num << ", but RandomChoiceWithMask needs 1 input.";
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return false;
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}
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size_t output_num = AnfAlgo::GetOutputTensorNum(kernel_node);
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if (output_num != 2) {
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MS_LOG(ERROR) << "Output number is " << output_num << ", but RandomChoiceWithMask has 2 outputs.";
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return false;
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}
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auto input_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 0);
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input_shape_size_ = input_shape.size();
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if (input_shape_size_ < 1 || input_shape_size_ > MAX_DIMENSION) {
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MS_LOG(ERROR) << "Input is " << input_shape_size_
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<< "-D, but RandomChoiceWithMask supports only 1-D to 5-D inputs.";
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return false;
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}
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// convert size_t to int
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for (auto i = 0; i < input_shape_size_; i++) {
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input_shape_5D_.push_back(input_shape[i]);
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}
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// convert shape to 5D
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while (input_shape_5D_.size() != MAX_DIMENSION) {
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input_shape_5D_.insert(input_shape_5D_.begin(), 1);
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}
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// init seedc_
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int seed = GetAttr<int>(kernel_node, "seed");
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int seed2 = GetAttr<int>(kernel_node, "seed2");
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if (seed2 != 0)
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seedc_ = seed2;
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else if (seed != 0)
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seedc_ = seed;
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else
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seedc_ = time(NULL);
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// init memory
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for (size_t i = 0; i < input_shape.size(); i++) {
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input_size_ *= input_shape[i];
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}
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count_ = GetAttr<int>(kernel_node, "count");
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// upper ceiling for input for ceil_power2
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ceil_power2_ = RcwmRoundUpPower2(input_size_);
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InitSizeLists();
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return true;
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}
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protected:
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void InitSizeLists() override {
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input_size_list_.push_back(input_size_ * sizeof(T));
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output_size_list_.push_back(count_ * input_shape_size_ * sizeof(S));
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output_size_list_.push_back(count_ * sizeof(T));
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workspace_size_list_.push_back(input_size_ * input_shape_size_ * sizeof(S));
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workspace_size_list_.push_back(ceil_power2_ * sizeof(S));
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workspace_size_list_.push_back(ceil_power2_ * sizeof(S));
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int blocknum = std::ceil(static_cast<float>(ceil_power2_) / BLOCKSIZE);
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workspace_size_list_.push_back(blocknum * sizeof(S));
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workspace_size_list_.push_back(ceil_power2_ * sizeof(S));
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workspace_size_list_.push_back(ceil_power2_ * sizeof(curandState));
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}
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private:
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int input_shape_size_;
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int seedc_;
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int input_size_;
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int count_;
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int ceil_power2_;
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std::vector<int> input_shape_5D_;
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std::vector<size_t> input_size_list_;
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std::vector<size_t> output_size_list_;
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std::vector<size_t> workspace_size_list_;
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};
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} // namespace kernel
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} // namespace mindspore
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_RANDOM_RANDOM_CHOICE_WITH_MASK_GPU_KERNEL_H_
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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import numpy as np
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import pytest
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import mindspore.context as context
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import mindspore.nn as nn
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from mindspore import Tensor
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from mindspore.ops import operations as P
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class RCWM_count_in(nn.Cell):
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def __init__(self):
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super(RCWM_count_in, self).__init__()
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self.RCWM_count_in = P.RandomChoiceWithMask(count=4, seed=1)
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def construct(self, x):
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return self.RCWM_count_in(x)
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class RCWM_count_out(nn.Cell):
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def __init__(self):
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super(RCWM_count_out, self).__init__()
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self.RCWM_count_out = P.RandomChoiceWithMask(count=10, seed=1)
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def construct(self, x):
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return self.RCWM_count_out(x)
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class RCWM_3D(nn.Cell):
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def __init__(self):
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super(RCWM_3D, self).__init__()
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self.RCWM_3D = P.RandomChoiceWithMask(count=10, seed=1)
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def construct(self, x):
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return self.RCWM_3D(x)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_RCWM_3D():
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context.set_context(mode=context.PYNATIVE_MODE, device_target="GPU")
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input_tensor = Tensor(np.ones([3, 4, 5]).astype(np.bool))
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expect1 = [[0, 1, 1], [0, 2, 1], [0, 2, 2], [1, 0, 1], [0, 1, 3], [0, 3, 0], [1, 3, 2], \
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[0, 0, 0], [1, 1, 2], [1, 3, 4]]
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expect2 = [True, True, True, True, True, True, True, True, True, True]
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rcwm = RCWM_3D()
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output1, output2 = rcwm(input_tensor)
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assert np.all(output1.asnumpy() == np.array(expect1)), "output: {}, expect: {}".format(output1, expect1)
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assert np.all(output2.asnumpy() == np.array(expect2)), "output: {}, expect: {}".format(output2, expect2)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_RCWM_count_out():
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context.set_context(mode=context.PYNATIVE_MODE, device_target="GPU")
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input_tensor = Tensor(np.array([[1, 0, 1, 0], [0, 0, 0, 1], [1, 1, 1, 1], [0, 0, 0, 1]]).astype(np.bool))
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expect1 = [[0, 2], [2, 2], [2, 1], [2, 0], [0, 0], [3, 3], [2, 3], [1, 3], [0, 0], [0, 0]]
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expect2 = [True, True, True, True, True, True, True, True, False, False]
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rcwm = RCWM_count_out()
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output1, output2 = rcwm(input_tensor)
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assert np.all(output1.asnumpy() == np.array(expect1)), "output: {}, expect: {}".format(output1, expect1)
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assert np.all(output2.asnumpy() == np.array(expect2)), "output: {}, expect: {}".format(output2, expect2)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_RCWM_count_in():
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context.set_context(mode=context.PYNATIVE_MODE, device_target="GPU")
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input_tensor = Tensor(np.array([[1, 0, 1, 0], [0, 0, 0, 1], [1, 1, 1, 1], [0, 0, 0, 1]]).astype(np.bool))
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expect1 = [[0, 2], [2, 2], [2, 1], [2, 0]]
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expect2 = [True, True, True, True]
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rcwm = RCWM_count_in()
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output1, output2 = rcwm(input_tensor)
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assert np.all(output1.asnumpy() == np.array(expect1)), "output: {}, expect: {}".format(output1, expect1)
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assert np.all(output2.asnumpy() == np.array(expect2)), "output: {}, expect: {}".format(output2, expect2)
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