commit
ec025a1c4c
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "backend/kernel_compiler/gpu/cuda_impl/adagrad_impl.cuh"
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template <typename T>
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__device__ __forceinline__ T SqrtFunc(T input) {
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return sqrt(input);
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}
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template <>
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__device__ __forceinline__ half SqrtFunc(half input) {
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return hsqrt(input);
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}
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template <typename T>
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__global__ void ApplyAdagradKernel(const size_t size,
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const bool update_slots,
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const T *learning_rate,
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const T *gradient,
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T *variable,
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T *accumulation) {
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for (size_t i = blockIdx.x * blockDim.x + threadIdx.x; i < size; i += gridDim.x * blockDim.x) {
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if (update_slots) {
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accumulation[i] += gradient[i] * gradient[i];
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}
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variable[i] -= learning_rate[0] * gradient[i] / SqrtFunc(accumulation[i]);
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}
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}
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template <typename T>
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void ApplyAdagrad(const size_t size,
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const bool update_slots,
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const T *learning_rate,
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const T *gradient,
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T *variable,
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T *accumulation,
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cudaStream_t cuda_stream) {
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ApplyAdagradKernel<<< GET_BLOCKS(size), GET_THREADS, 0, cuda_stream>>>(
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size, update_slots, learning_rate, gradient, variable, accumulation);
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}
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template void ApplyAdagrad<float>(const size_t size,
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const bool update_slots,
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const float *learning_rate,
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const float *gradient,
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float *variable,
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float *accumulation,
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cudaStream_t cuda_stream);
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template void ApplyAdagrad<half>(const size_t size,
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const bool update_slots,
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const half *learning_rate,
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const half *gradient,
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half *variable,
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half *accumulation,
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cudaStream_t cuda_stream);
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_ADAGRAD_IMPL_H_
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#define MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_ADAGRAD_IMPL_H_
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#include "runtime/device/gpu/cuda_common.h"
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template <typename T>
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void ApplyAdagrad(const size_t size,
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const bool update_slots,
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const T *learning_rate,
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const T *gradient,
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T *variable,
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T *accumulation,
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cudaStream_t stream);
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_ADAGRAD_IMPL_H_
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "backend/kernel_compiler/gpu/nn/adagrad_gpu_kernel.h"
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namespace mindspore {
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namespace kernel {
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MS_REG_GPU_KERNEL_ONE(ApplyAdagrad,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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AdagradGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(ApplyAdagrad,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddOutputAttr(kNumberTypeFloat16)
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.AddOutputAttr(kNumberTypeFloat16),
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AdagradGpuKernel, half)
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} // namespace kernel
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} // namespace mindspore
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_ADAGRAD_GPU_KERNEL_H
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#define MINDSPORE_ADAGRAD_GPU_KERNEL_H
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#include <vector>
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#include "backend/kernel_compiler/gpu/gpu_kernel.h"
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#include "backend/kernel_compiler/gpu/gpu_kernel_factory.h"
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#include "backend/kernel_compiler/gpu/cuda_impl/adagrad_impl.cuh"
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namespace mindspore {
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namespace kernel {
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template <typename T>
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class AdagradGpuKernel : public GpuKernel {
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public:
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AdagradGpuKernel()
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: variable_size_(0), accumulation_size_(0), learning_rate_size_(0), gradient_size_(0), update_slots(true) {}
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~AdagradGpuKernel() override = default;
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const std::vector<size_t> &GetInputSizeList() const override { return input_size_list_; }
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const std::vector<size_t> &GetOutputSizeList() const override { return output_size_list_; }
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const std::vector<size_t> &GetWorkspaceSizeList() const override { return workspace_size_list_; }
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bool Init(const CNodePtr &kernel_node) override {
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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if (input_num != 4) {
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MS_LOG(ERROR) << "Input number is " << input_num << ", but adagrad needs 4 inputs.";
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return false;
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}
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variable_size_ = sizeof(T);
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accumulation_size_ = sizeof(T);
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learning_rate_size_ = sizeof(T);
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gradient_size_ = sizeof(T);
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auto variable_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 0);
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for (size_t i = 0; i < variable_shape.size(); i++) {
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variable_size_ *= variable_shape[i];
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}
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auto accumulation_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 1);
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for (size_t i = 0; i < accumulation_shape.size(); i++) {
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accumulation_size_ *= accumulation_shape[i];
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}
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auto gradient_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 3);
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for (size_t i = 0; i < gradient_shape.size(); i++) {
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gradient_size_ *= gradient_shape[i];
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}
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InitSizeLists();
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return true;
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}
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bool Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &, const std::vector<AddressPtr> &,
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void *stream_ptr) override {
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T *variable = GetDeviceAddress<T>(inputs, 0);
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T *accumulation = GetDeviceAddress<T>(inputs, 1);
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T *learning_rate = GetDeviceAddress<T>(inputs, 2);
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T *gradient = GetDeviceAddress<T>(inputs, 3);
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ApplyAdagrad(inputs[0]->size / sizeof(T), update_slots, learning_rate, gradient, variable, accumulation,
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reinterpret_cast<cudaStream_t>(stream_ptr));
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return true;
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}
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protected:
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void InitSizeLists() override {
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input_size_list_.push_back(variable_size_);
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input_size_list_.push_back(accumulation_size_);
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input_size_list_.push_back(learning_rate_size_);
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input_size_list_.push_back(gradient_size_);
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output_size_list_.push_back(0);
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output_size_list_.push_back(0);
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}
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private:
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size_t variable_size_;
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size_t accumulation_size_;
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size_t learning_rate_size_;
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size_t gradient_size_;
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bool update_slots;
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std::vector<size_t> input_size_list_;
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std::vector<size_t> output_size_list_;
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std::vector<size_t> workspace_size_list_;
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};
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} // namespace kernel
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} // namespace mindspore
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#endif // MINDSPORE_ADAGRAD_GPU_KERNEL_H
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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import numpy as np
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import pytest
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import mindspore.context as context
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import mindspore.nn as nn
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from mindspore import Tensor, Parameter
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from mindspore.ops import operations as P
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import mindspore.common.dtype as mstype
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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var_np = np.random.rand(3, 3).astype(np.float32)
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accum_np = np.random.rand(3, 3).astype(np.float32)
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class Net(nn.Cell):
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def __init__(self):
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super(Net, self).__init__()
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self.apply_adagrad = P.ApplyAdagrad()
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self.var = Parameter(Tensor(var_np), name="var")
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self.accum = Parameter(Tensor(accum_np), name="accum")
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def construct(self, lr, grad):
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self.apply_adagrad(self.var, self.accum, lr, grad)
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return self.var, self.accum
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_apply_adagrad():
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# numpy op
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grident_np = np.random.rand(3, 3).astype(np.float32)
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expect_accum_np = accum_np + grident_np * grident_np
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expect_var_np = var_np - (0.001 * grident_np * (1 / np.sqrt(expect_accum_np + 1e-6)))
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net = Net()
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lr = Tensor(0.001, mstype.float32)
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grad = Tensor(grident_np)
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out = net(lr, grad)
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res_var_mindspore = out[0].asnumpy()
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res_accum_mindspore = out[1].asnumpy()
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eps = np.array([1e-6 for i in range(9)]).reshape(3, 3)
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assert np.all(expect_var_np - res_var_mindspore < eps)
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assert np.all(expect_accum_np - res_accum_mindspore < eps)
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