!13581 [ms][lite][cpu] master softmax exp erf fp16 32 算子优化
From: @lzkcode Reviewed-by: @zhang_xue_tong,@zhanghaibo5 Signed-off-by: @zhang_xue_tongpull/13581/MERGE
mindspore-ci-bot
4 years ago
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "nnacl/fp16/exp_fp16.h"
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#include <math.h>
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#include <string.h>
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#include "nnacl/errorcode.h"
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void ExpFp16(const float16_t *src, float16_t *dst, int num) {
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int i = 0;
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#ifdef ENABLE_ARM64
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int count = (num / C8NUM) * C8NUM;
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for (; i < count; i += C8NUM) {
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simd_exp_fp16(vld1q_f16(src + i), dst + i);
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}
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#endif
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for (; i < num; ++i) {
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single_exp_fp16(src[i], dst + i);
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}
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}
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_LITE_NNACL_FP16_EXP_H_
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#define MINDSPORE_LITE_NNACL_FP16_EXP_H_
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#include "nnacl/op_base.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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void ExpFp16(const float16_t *src, float16_t *dst, int num);
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#if defined(ENABLE_ARM64)
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static inline float32x4_t exp_fp32(float32x4_t input) {
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static float32x4_t param[] = {{0.693147f, 0.693147f, 0.693147f, 0.693147f},
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{1.0f / 120, 1.0f / 120, 1.0f / 120, 1.0f / 120},
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{1.0f / 24, 1.0f / 24, 1.0f / 24, 1.0f / 24},
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{1.0f / 6, 1.0f / 6, 1.0f / 6, 1.0f / 6},
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{0.5f, 0.5f, 0.5f, 0.5f},
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{1.0f, 1.0f, 1.0f, 1.0f}};
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int32x4_t integer = vcvtq_s32_f32(input / param[0]);
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float32x4_t decimal = input - vcvtq_f32_s32(integer) * param[0];
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int32x4_t int_exp = vshlq_s32((integer + vmovq_n_s32(127)), vmovq_n_s32(23));
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float32x4_t decimal_exp =
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param[5] +
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decimal * (param[5] + decimal * (param[4] + decimal * (param[3] + decimal * (param[2] + decimal * param[1]))));
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decimal_exp = decimal_exp * vld1q_f32((float *)(&int_exp));
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return decimal_exp;
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}
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static inline void simd_exp_fp16(float16x8_t input, float16_t *dst) {
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static float16x8_t maxv = {88.0f, 88.0f, 88.0f, 88.0f, 88.0f, 88.0f, 88.0f, 88.0f};
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static float16x8_t minv = {-88.0f, -88.0f, -88.0f, -88.0f, -88.0f, -88.0f, -88.0f, -88.0f};
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input = vmaxq_f16(minv, vminq_f16(input, maxv));
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float32x4_t input_low = vcvt_f32_f16(vget_low_f16(input));
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float32x4_t input_high = vcvt_high_f32_f16(input);
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vst1q_f16(dst, vcombine_f16(vcvt_f16_f32(exp_fp32(input_low)), vcvt_f16_f32(exp_fp32(input_high))));
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}
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#endif
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static inline void single_exp_fp16(float16_t src, float16_t *dst) {
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static float param[] = {0.693147f, 1.0f / 120, 1.0f / 24, 1.0f / 6, 1.0f / 2, 1.0f};
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src = MSMAX(-88.0f, MSMIN(88.0f, src));
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int integer = (float)src / param[0];
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float decimal = (float)src - integer * param[0];
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int int_exp = (integer + 127) << 23;
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float decimal_exp =
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1.0f + decimal * (1.0f + decimal * (0.5f + decimal * (param[3] + decimal * (param[2] + decimal * param[1]))));
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*dst = (float16_t)(*((float *)&int_exp) * decimal_exp);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif // MINDSPORE_LITE_NNACL_FP16_EXP_H_
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