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/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/operators/fusion_lstm_op.h"
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#include <string>
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#include "paddle/fluid/operators/math/blas.h"
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#include "paddle/fluid/operators/math/cpu_vec.h"
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#include "paddle/fluid/operators/math/fc_compute.h"
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#include "paddle/fluid/operators/math/sequence2batch.h"
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#include "paddle/fluid/platform/cpu_info.h"
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namespace paddle {
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namespace operators {
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void FusionLSTMOp::InferShape(framework::InferShapeContext* ctx) const {
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PADDLE_ENFORCE(ctx->HasInput("X"), "Input(X) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasInput("WeightX"),
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"Input(WeightX) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasInput("WeightH"),
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"Input(WeightH) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasInput("Bias"),
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"Input(Bias) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasOutput("XX"),
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"Output(XX) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasOutput("Hidden"),
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"Output(Hidden) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasOutput("Cell"),
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"Output(Cell) of LSTM should not be null.");
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auto x_dims = ctx->GetInputDim("X");
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PADDLE_ENFORCE_EQ(x_dims.size(), 2, "Input(X)'s rank must be 2.");
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if (ctx->HasInput("H0")) {
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PADDLE_ENFORCE(ctx->HasInput("C0"),
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"Input(Cell) and Input(Hidden) of LSTM should not "
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"be null at the same time.");
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auto h_dims = ctx->GetInputDim("H0");
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auto c_dims = ctx->GetInputDim("C0");
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PADDLE_ENFORCE(h_dims == c_dims,
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"The dimension of Input(H0) and Input(C0) "
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"should be the same.");
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}
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auto wx_dims = ctx->GetInputDim("WeightX");
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PADDLE_ENFORCE_EQ(wx_dims.size(), 2,
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"The rank of Input(WeightX) should be 2.");
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PADDLE_ENFORCE_EQ(wx_dims[0], x_dims[1],
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"The first dimension of Input(WeightX) "
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"should be %d.",
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x_dims[1]);
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int frame_size = wx_dims[1] / 4;
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auto wh_dims = ctx->GetInputDim("WeightH");
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PADDLE_ENFORCE_EQ(wh_dims.size(), 2,
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"The rank of Input(WeightH) should be 2.");
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PADDLE_ENFORCE_EQ(wh_dims[0], frame_size,
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"The first dimension of Input(WeightH) "
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"should be %d.",
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frame_size);
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PADDLE_ENFORCE_EQ(wh_dims[1], 4 * frame_size,
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"The second dimension of Input(WeightH) "
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"should be 4 * %d.",
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frame_size);
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auto b_dims = ctx->GetInputDim("Bias");
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PADDLE_ENFORCE_EQ(b_dims.size(), 2, "The rank of Input(Bias) should be 2.");
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PADDLE_ENFORCE_EQ(b_dims[0], 1,
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"The first dimension of Input(Bias) should be 1.");
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PADDLE_ENFORCE_EQ(
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b_dims[1], (ctx->Attrs().Get<bool>("use_peepholes") ? 7 : 4) * frame_size,
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"The second dimension of Input(Bias) should be "
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"7 * %d if enable peepholes connection or"
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"4 * %d if disable peepholes",
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frame_size, frame_size);
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framework::DDim out_dims({x_dims[0], frame_size});
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ctx->SetOutputDim("Hidden", out_dims);
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ctx->SetOutputDim("Cell", out_dims);
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ctx->ShareLoD("X", "Hidden");
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ctx->ShareLoD("X", "Cell");
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int xx_width;
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if (ctx->Attrs().Get<bool>("use_seq")) {
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xx_width = wx_dims[1];
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} else {
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xx_width = x_dims[1] > wx_dims[1] ? wx_dims[1] : x_dims[1];
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PADDLE_ENFORCE(ctx->HasOutput("BatchedInput"),
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"Output(BatchedInput) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasOutput("BatchedHidden"),
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"Output(BatchedHidden) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasOutput("BatchedCell"),
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"Output(BatchedCell) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasOutput("ReorderedH0"),
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"Output(ReorderedH0) of LSTM should not be null.");
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PADDLE_ENFORCE(ctx->HasOutput("ReorderedC0"),
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"Output(ReorderedC0) of LSTM should not be null.");
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ctx->SetOutputDim("BatchedInput", {x_dims[0], wx_dims[1]});
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ctx->SetOutputDim("BatchedHidden", out_dims);
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ctx->SetOutputDim("BatchedCell", out_dims);
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}
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ctx->SetOutputDim("XX", {x_dims[0], xx_width});
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ctx->ShareLoD("X", "XX");
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}
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framework::OpKernelType FusionLSTMOp::GetExpectedKernelType(
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const framework::ExecutionContext& ctx) const {
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return framework::OpKernelType(
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framework::ToDataType(ctx.Input<framework::LoDTensor>("X")->type()),
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ctx.device_context());
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}
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void FusionLSTMOpMaker::Make() {
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AddInput("X",
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"(LoDTensor) the input is a LodTensor, which support "
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"variable-time length input sequence. The underlying tensor in "
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"this LoDTensor is a matrix with shape (T X M), where T is the "
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"total time steps in this mini-batch, M is the dim size of x.");
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AddInput("WeightX",
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"(Tensor) the learnable weights of X."
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" - The shape is (M x 4D), where M is the dim size of x, D is the "
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"hidden size. "
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" - Weight = {W_cx, W_ix, W_fx, W_ox}");
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AddInput("WeightH",
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"(Tensor) same as LSTMOp, the learnable hidden-hidden weights."
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" - The shape is (D x 4D), where D is the hidden size. "
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" - Weight = {W_ch, W_ih, W_fh, W_oh}");
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AddInput("Bias",
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"(Tensor) the learnable weights. Almost same as LSTMOp"
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"Note: we should add the fc bias into this (1x4D) in bias."
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"input-hidden bias weight and peephole connections weight if "
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"setting `use_peepholes` True. "
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"1. `use_peepholes = False` "
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" - The shape is (1 x 4D). "
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" - Bias = {b_c, b_i, b_f, b_o}."
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"2. `use_peepholes = True` "
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" - The shape is (1 x 7D). "
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" - Bias = {b_c, b_i, b_f, b_o, W_ic, W_fc, W_oc}.");
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AddInput("H0",
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"(Tensor, optional) (same as LSTMOp) the initial hidden state is an "
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"optional "
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"input. This is a tensor with shape (N x D), where N is the "
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"batch size and D is the hidden size.")
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.AsDispensable();
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AddInput("C0",
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"(Tensor, optional) (same as LSTMOp) (the initial cell state is an "
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"optional "
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"input. This is a tensor with shape (N x D), where N is the "
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"batch size. `H0` and `C0` can be NULL but only at the same time.")
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.AsDispensable();
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AddOutput("Hidden",
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"(LoDTensor) (same as LSTMOp) the hidden state of LSTM operator. "
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"The shape is (T x D), and lod is the same with the `Input`.");
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AddOutput("Cell",
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"(LoDTensor) (same as LSTMOp) the cell state of LSTM operator. "
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"The shape is (T x D), and lod is the same with the `Input`.");
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AddOutput("XX",
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"(LoDTensor) the result after X * WeightX (size is T x 4D)"
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" or batched_X (size is T x M), this will be automatically chosen,"
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" where T is the total time steps in this mini-batch,"
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" D is the hidden size, M is the dim size of x input.")
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.AsIntermediate();
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AddOutput("BatchedInput", "(LoDTensor) (T x 4D).").AsIntermediate();
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AddOutput("BatchedHidden", "(LoDTensor) (T x D).").AsIntermediate();
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AddOutput("BatchedCell", "(LoDTensor) (T x D).").AsIntermediate();
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AddOutput("ReorderedH0", "(LoDTensor) (N x D).").AsIntermediate();
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AddOutput("ReorderedC0", "(LoDTensor) (N x D).").AsIntermediate();
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AddAttr<bool>("use_peepholes",
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"(bool, defalut: True) "
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"whether to enable diagonal/peephole connections.")
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.SetDefault(true);
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AddAttr<bool>("is_reverse",
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"(bool, defalut: False) "
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"whether to compute reversed LSTM.")
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.SetDefault(false);
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AddAttr<bool>("use_seq",
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"(bool, defalut: True) "
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"whether to use seq mode to compute.")
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.SetDefault(true);
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AddAttr<std::string>("gate_activation",
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"(string, default: sigmoid)"
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"The activation for input gate, forget gate and output "
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"gate, `sigmoid` by default.")
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.SetDefault("sigmoid")
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.InEnum({"sigmoid", "tanh", "relu", "identity"});
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AddAttr<std::string>("cell_activation",
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"(string, default: tanh)"
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"The activation for cell output, `tanh` by defalut.")
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.SetDefault("tanh")
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.InEnum({"sigmoid", "tanh", "relu", "identity"});
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AddAttr<std::string>("candidate_activation",
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"(string, default: tanh)"
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"The activation for candidate hidden state, "
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"`tanh` by default.")
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.SetDefault("tanh")
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.InEnum({"sigmoid", "tanh", "relu", "identity"});
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AddComment(R"DOC(
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Fusion Long-Short Term Memory (LSTM) Operator.
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This operator fuse the X into LSTM, more details can refer to LSTM op.
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)DOC");
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}
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template <typename T>
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class FuisonLSTMKernel : public framework::OpKernel<T> {
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public:
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#define INIT_VEC_FUNC \
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std::function<void(const int, const T *, T *)> act_gate, act_cell, act_cand; \
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auto& act_gate_str = ctx.Attr<std::string>("gate_activation"); \
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auto& act_cell_str = ctx.Attr<std::string>("cell_activation"); \
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auto& act_cand_str = ctx.Attr<std::string>("candidate_activation"); \
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if (platform::jit::MayIUse(platform::jit::avx)) { \
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math::VecActivations<T, platform::jit::avx> act_functor; \
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act_gate = act_functor(act_gate_str); \
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act_cell = act_functor(act_cell_str); \
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act_cand = act_functor(act_cand_str); \
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} else { \
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math::VecActivations<T, platform::jit::isa_any> act_functor; \
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act_gate = act_functor(act_gate_str); \
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act_cell = act_functor(act_cell_str); \
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act_cand = act_functor(act_cand_str); \
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}
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#define INIT_BASE_INPUT_OUTPUT \
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auto* x = ctx.Input<LoDTensor>("X"); \
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auto* h0 = ctx.Input<Tensor>("H0"); \
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auto* c0 = ctx.Input<Tensor>("C0"); \
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auto* wx = ctx.Input<Tensor>("WeightX"); \
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auto* wh = ctx.Input<Tensor>("WeightH"); \
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auto* bias = ctx.Input<Tensor>("Bias"); \
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auto* xx = ctx.Output<LoDTensor>("XX"); \
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auto* hidden_out = ctx.Output<LoDTensor>("Hidden"); \
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auto* cell_out = ctx.Output<LoDTensor>("Cell"); \
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bool is_reverse = ctx.Attr<bool>("is_reverse"); \
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bool use_peepholes = ctx.Attr<bool>("use_peepholes");
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#define INIT_BASE_SIZES \
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auto x_dims = x->dims(); /* T x M*/ \
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auto wh_dims = wh->dims(); /* D x 4D*/ \
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const int M = x_dims[1]; \
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const int D = wh_dims[0]; \
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const int D2 = D * 2; \
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const int D3 = D * 3; \
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const int D4 = wh_dims[1];
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void SeqCompute(const framework::ExecutionContext& ctx) const {
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using DeviceContext = paddle::platform::CPUDeviceContext;
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INIT_BASE_INPUT_OUTPUT
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INIT_BASE_SIZES
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INIT_VEC_FUNC
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auto x_lod = x->lod();
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const int total_T = x_dims[0];
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const int N = x_lod[0].size() - 1;
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const T* x_data = x->data<T>();
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const T* h0_data = h0 ? h0->data<T>() : nullptr;
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const T* c0_data = c0 ? c0->data<T>() : nullptr;
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const T* wx_data = wx->data<T>();
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const T* wh_data = wh->data<T>();
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const T* wc_data = bias->data<T>() + D4; // diagonal weight
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auto place = ctx.GetPlace();
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T* xx_data = xx->mutable_data<T>(place);
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T* hidden_out_data = hidden_out->mutable_data<T>(place);
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T* cell_out_data = cell_out->mutable_data<T>(place);
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Tensor checked_cell;
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T* checked_cell_data = nullptr;
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if (use_peepholes) {
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// w_ic * Ct-1, w_fc * Ct-1 // , w_oc * Ct => ih
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checked_cell_data = checked_cell.mutable_data<T>({2, D}, place);
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}
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auto blas = math::GetBlas<DeviceContext, T>(ctx);
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math::FCCompute<DeviceContext, T>(blas, total_T, D4, M, x_data, wx_data,
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xx_data, bias->data<T>());
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int xx_offset = D4;
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int gate_offset = D;
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if (is_reverse) {
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const int offset = (total_T - 1) * D;
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xx_data = xx_data + offset * 4;
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hidden_out_data = hidden_out_data + offset;
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cell_out_data = cell_out_data + offset;
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xx_offset = -D4;
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gate_offset = -D;
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}
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auto move_step = [&]() {
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xx_data = xx_data + xx_offset;
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hidden_out_data = hidden_out_data + gate_offset;
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cell_out_data = cell_out_data + gate_offset;
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};
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for (int i = 0; i < N; ++i) {
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int bid = is_reverse ? N - 1 - i : i;
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int seq_len = x_lod[0][bid + 1] - x_lod[0][bid];
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const T* prev_c_data = nullptr;
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const T* prev_h_data = nullptr;
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int tstart = 0;
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if (h0_data) {
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prev_h_data = h0_data + bid * D;
|
|
|
|
prev_c_data = c0_data + bid * D;
|
|
|
|
} else {
|
|
|
|
// W_ch, W_ih, W_fh, W_oh
|
|
|
|
act_gate(D, xx_data + D, xx_data + D);
|
|
|
|
act_cand(D, xx_data, xx_data);
|
|
|
|
// C_t = input * tilde
|
|
|
|
blas.VMUL(D, xx_data, xx_data + D, cell_out_data);
|
|
|
|
|
|
|
|
// H_t = act_state(cellout) * outgate
|
|
|
|
if (use_peepholes) {
|
|
|
|
// + W_oc * C_t for peephole connection
|
|
|
|
// put result on W_ih
|
|
|
|
blas.VMUL(D, wc_data + D2, cell_out_data, xx_data + D);
|
|
|
|
blas.VADD(D, xx_data + D, xx_data + D3, xx_data + D3);
|
|
|
|
}
|
|
|
|
act_gate(D, xx_data + D3, xx_data + D3);
|
|
|
|
act_cell(D, cell_out_data, xx_data + D2);
|
|
|
|
blas.VMUL(D, xx_data + D2, xx_data + D3, hidden_out_data);
|
|
|
|
|
|
|
|
// prev
|
|
|
|
prev_h_data = hidden_out_data;
|
|
|
|
prev_c_data = cell_out_data;
|
|
|
|
tstart = 1;
|
|
|
|
move_step();
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int step = tstart; step < seq_len; ++step) {
|
|
|
|
// + W_h * H_t-1
|
|
|
|
blas.GEMM(CblasNoTrans, CblasNoTrans, 1, D4, D, static_cast<T>(1),
|
|
|
|
prev_h_data, D, wh_data, D4, static_cast<T>(1), xx_data, D4);
|
|
|
|
|
|
|
|
// W_ch, W_ih, W_fh, W_oh
|
|
|
|
if (use_peepholes) {
|
|
|
|
// + W_ic|W_fc * C_t-1 for peephole connection
|
|
|
|
blas.VMUL(D, wc_data, prev_c_data, checked_cell_data);
|
|
|
|
blas.VMUL(D, wc_data + D, prev_c_data, checked_cell_data + D);
|
|
|
|
blas.VADD(D2, checked_cell_data, xx_data + D, xx_data + D);
|
|
|
|
act_gate(D2, xx_data + D, xx_data + D);
|
|
|
|
} else {
|
|
|
|
act_gate(D3, xx_data + D, xx_data + D);
|
|
|
|
}
|
|
|
|
// a = I_t * act_cand(ch)
|
|
|
|
act_cand(D, xx_data, xx_data);
|
|
|
|
blas.VMUL(D, xx_data, xx_data + D, xx_data + D);
|
|
|
|
// b = C_t-1 * F_t
|
|
|
|
blas.VMUL(D, prev_c_data, xx_data + D2, xx_data + D2);
|
|
|
|
// C_t = a + b
|
|
|
|
blas.VADD(D, xx_data + D, xx_data + D2, cell_out_data);
|
|
|
|
|
|
|
|
// H_t = act_cell(C_t) * act_gate(O_c += C_t * W_oc)
|
|
|
|
if (use_peepholes) {
|
|
|
|
// put result on W_ih
|
|
|
|
blas.VMUL(D, wc_data + D2, cell_out_data, xx_data + D);
|
|
|
|
blas.VADD(D, xx_data + D, xx_data + D3, xx_data + D3);
|
|
|
|
act_gate(D, xx_data + D3, xx_data + D3);
|
|
|
|
}
|
|
|
|
act_cell(D, cell_out_data, xx_data + D2);
|
|
|
|
blas.VMUL(D, xx_data + D2, xx_data + D3, hidden_out_data);
|
|
|
|
|
|
|
|
// prev
|
|
|
|
prev_h_data = hidden_out_data;
|
|
|
|
prev_c_data = cell_out_data;
|
|
|
|
|
|
|
|
move_step();
|
|
|
|
} // for seqlen
|
|
|
|
} // for batch
|
|
|
|
}
|
|
|
|
|
|
|
|
void BatchCompute(const framework::ExecutionContext& ctx) const {
|
|
|
|
using DeviceContext = platform::CPUDeviceContext;
|
|
|
|
INIT_BASE_INPUT_OUTPUT
|
|
|
|
if (x->lod()[0].size() == 2) { // batch size == 1
|
|
|
|
SeqCompute(ctx);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
INIT_BASE_SIZES
|
|
|
|
INIT_VEC_FUNC
|
|
|
|
|
|
|
|
auto* reordered_h0 = ctx.Output<Tensor>("ReorderedH0");
|
|
|
|
auto* reordered_c0 = ctx.Output<Tensor>("ReorderedC0");
|
|
|
|
auto* batched_input = ctx.Output<LoDTensor>("BatchedInput");
|
|
|
|
auto* batched_c_out = ctx.Output<LoDTensor>("BatchedCell");
|
|
|
|
auto* batched_h_out = ctx.Output<LoDTensor>("BatchedHidden");
|
|
|
|
|
|
|
|
const T* x_data = x->data<T>();
|
|
|
|
const T* wx_data = wx->data<T>();
|
|
|
|
const T* wh_data = wh->data<T>();
|
|
|
|
const T* bias_data = bias->data<T>();
|
|
|
|
const T* wc_data = bias_data + D4; // w_ic, w_fc, w_oc
|
|
|
|
auto place = ctx.GetPlace();
|
|
|
|
T* xx_data = xx->mutable_data<T>(place);
|
|
|
|
T* batched_input_data = batched_input->mutable_data<T>(place);
|
|
|
|
T* batched_c_out_data = batched_c_out->mutable_data<T>(place);
|
|
|
|
T* batched_h_out_data = batched_h_out->mutable_data<T>(place);
|
|
|
|
hidden_out->mutable_data<T>(place);
|
|
|
|
cell_out->mutable_data<T>(place);
|
|
|
|
|
|
|
|
// use local variable
|
|
|
|
framework::DDim check_dims({3, D});
|
|
|
|
Tensor checked_cell; // w_ic * Ct-1, w_fc * Ct-1, w_oc * Ct
|
|
|
|
auto checked_cell_data =
|
|
|
|
checked_cell.mutable_data<T>(check_dims, ctx.GetPlace());
|
|
|
|
|
|
|
|
math::LoDTensor2BatchFunctor<DeviceContext, T> to_batch;
|
|
|
|
auto& dev_ctx = ctx.template device_context<DeviceContext>();
|
|
|
|
auto blas = math::GetBlas<DeviceContext, T>(dev_ctx);
|
|
|
|
if (M > D4) {
|
|
|
|
math::FCCompute<DeviceContext, T>(blas, x_dims[0], D4, M, x_data, wx_data,
|
|
|
|
xx_data, bias->data<T>());
|
|
|
|
to_batch(dev_ctx, *xx, batched_input, true, is_reverse);
|
|
|
|
} else {
|
|
|
|
to_batch(dev_ctx, *x, xx, true, is_reverse);
|
|
|
|
batched_input->set_lod(xx->lod());
|
|
|
|
math::FCCompute<DeviceContext, T>(blas, x_dims[0], D4, M, xx_data,
|
|
|
|
wx_data, batched_input_data,
|
|
|
|
bias->data<T>());
|
|
|
|
}
|
|
|
|
|
|
|
|
auto batched_lod = batched_input->lod();
|
|
|
|
const auto& seq_order = batched_lod[2];
|
|
|
|
const int max_bs = seq_order.size();
|
|
|
|
reordered_h0->Resize({max_bs, D});
|
|
|
|
reordered_c0->Resize({max_bs, D});
|
|
|
|
|
|
|
|
T* prev_batch_h_data = nullptr;
|
|
|
|
T* prev_batch_c_data = nullptr;
|
|
|
|
T* cur_batch_in_data = batched_input_data;
|
|
|
|
T* cur_batch_h_out_data = batched_h_out_data;
|
|
|
|
T* cur_batch_c_out_data = batched_c_out_data;
|
|
|
|
|
|
|
|
auto move_step = [&](int bs) {
|
|
|
|
cur_batch_in_data += bs * D4;
|
|
|
|
cur_batch_c_out_data += bs * D;
|
|
|
|
cur_batch_h_out_data += bs * D;
|
|
|
|
};
|
|
|
|
|
|
|
|
int tstart = 0;
|
|
|
|
if (h0) {
|
|
|
|
// reorder h0, c0
|
|
|
|
T* reordered_h0_data = reordered_h0->mutable_data<T>(place);
|
|
|
|
T* reordered_c0_data = reordered_c0->mutable_data<T>(place);
|
|
|
|
const T* h0_data = h0->data<T>();
|
|
|
|
const T* c0_data = c0->data<T>();
|
|
|
|
prev_batch_h_data = reordered_h0_data;
|
|
|
|
prev_batch_c_data = reordered_c0_data;
|
|
|
|
size_t sz = sizeof(T) * D;
|
|
|
|
for (int i = 0; i < max_bs; ++i) {
|
|
|
|
std::memcpy(reordered_h0_data, h0_data + seq_order[i] * D, sz);
|
|
|
|
std::memcpy(reordered_c0_data, c0_data + seq_order[i] * D, sz);
|
|
|
|
reordered_h0_data += D;
|
|
|
|
reordered_c0_data += D;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// Compute with no H0/C0
|
|
|
|
T* cur_in_data = cur_batch_in_data;
|
|
|
|
T* cur_c_out_data = cur_batch_c_out_data;
|
|
|
|
T* cur_h_out_data = cur_batch_h_out_data;
|
|
|
|
|
|
|
|
// If step == 0 and there is no initialized hidden state, that is to say
|
|
|
|
// the H0 is zeros. Then W_h * H_t-1 can be skiped
|
|
|
|
|
|
|
|
for (int i = 0; i < max_bs; ++i) { // iterate each data in 1st batch
|
|
|
|
// ~C_t
|
|
|
|
act_cand(D, cur_in_data, cur_in_data);
|
|
|
|
|
|
|
|
if (use_peepholes) {
|
|
|
|
// I_t, F_t
|
|
|
|
act_gate(D2, cur_in_data + D, cur_in_data + D);
|
|
|
|
} else {
|
|
|
|
// I_t, F_t, O_t
|
|
|
|
act_gate(D3, cur_in_data + D, cur_in_data + D);
|
|
|
|
}
|
|
|
|
|
|
|
|
// C_t = I_t * ~C_t
|
|
|
|
blas.VMUL(D, cur_in_data, cur_in_data + D, cur_c_out_data);
|
|
|
|
|
|
|
|
if (use_peepholes) {
|
|
|
|
// + W_oc * C_t for peephole connection
|
|
|
|
blas.VMUL(D, wc_data + D2, cur_c_out_data, checked_cell_data + D2);
|
|
|
|
blas.VADD(D, cur_in_data + D3, checked_cell_data + D2,
|
|
|
|
cur_in_data + D3);
|
|
|
|
// O_t
|
|
|
|
act_gate(D, cur_in_data + D3, cur_in_data + D3);
|
|
|
|
}
|
|
|
|
|
|
|
|
// hidden out= act_state(cellout) * outgate
|
|
|
|
act_cell(D, cur_c_out_data, cur_in_data + D2);
|
|
|
|
// H_t = O_t * act_state(C_t)
|
|
|
|
blas.VMUL(D, cur_in_data + D2, cur_in_data + D3, cur_h_out_data);
|
|
|
|
|
|
|
|
// move to next data in the same batch
|
|
|
|
cur_in_data += D4;
|
|
|
|
cur_c_out_data += D;
|
|
|
|
cur_h_out_data += D;
|
|
|
|
}
|
|
|
|
|
|
|
|
// move to data for next timestep
|
|
|
|
prev_batch_h_data = cur_batch_h_out_data;
|
|
|
|
prev_batch_c_data = cur_batch_c_out_data;
|
|
|
|
move_step(max_bs);
|
|
|
|
tstart = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
const auto& batch_starts = batched_lod[0];
|
|
|
|
const int max_seq_len = batch_starts.size() - 1;
|
|
|
|
for (int step = tstart; step < max_seq_len; ++step) {
|
|
|
|
const int cur_bs = batch_starts[step + 1] - batch_starts[step];
|
|
|
|
// + W_h * H_t-1
|
|
|
|
blas.GEMM(CblasNoTrans, CblasNoTrans, cur_bs, D4, D, static_cast<T>(1),
|
|
|
|
prev_batch_h_data, D, wh_data, D4, static_cast<T>(1),
|
|
|
|
cur_batch_in_data, D4);
|
|
|
|
|
|
|
|
T* cur_in_data = cur_batch_in_data;
|
|
|
|
T* cur_c_out_data = cur_batch_c_out_data;
|
|
|
|
T* cur_h_out_data = cur_batch_h_out_data;
|
|
|
|
T* prev_c_data = prev_batch_c_data; // NULL if no C0 in step0
|
|
|
|
T* prev_h_data = prev_batch_h_data; // NULL if no H0 in step0
|
|
|
|
auto next_data_in_batch = [&]() {
|
|
|
|
cur_in_data += D4;
|
|
|
|
cur_c_out_data += D;
|
|
|
|
cur_h_out_data += D;
|
|
|
|
prev_c_data = prev_c_data ? prev_c_data + D : nullptr;
|
|
|
|
prev_h_data = prev_h_data ? prev_h_data + D : nullptr;
|
|
|
|
};
|
|
|
|
|
|
|
|
for (int i = 0; i < cur_bs; ++i) { // iterate each data in same batch
|
|
|
|
// ~C_t
|
|
|
|
act_cand(D, cur_in_data, cur_in_data);
|
|
|
|
|
|
|
|
if (use_peepholes) {
|
|
|
|
// + W_ic|W_fc * C_t-1 for peephole connection
|
|
|
|
blas.VMUL(D, wc_data, prev_c_data, checked_cell_data);
|
|
|
|
blas.VMUL(D, wc_data + D, prev_c_data, checked_cell_data + D);
|
|
|
|
blas.VADD(D2, cur_in_data + D, checked_cell_data, cur_in_data + D);
|
|
|
|
// I_t, F_t
|
|
|
|
act_gate(D2, cur_in_data + D, cur_in_data + D);
|
|
|
|
} else {
|
|
|
|
// I_t, F_t, O_t
|
|
|
|
act_gate(D3, cur_in_data + D, cur_in_data + D);
|
|
|
|
}
|
|
|
|
|
|
|
|
// F_t * C_t-1
|
|
|
|
blas.VMUL(D, cur_in_data + D2, prev_c_data, cur_in_data + D2);
|
|
|
|
// I_t * ~C_t
|
|
|
|
blas.VMUL(D, cur_in_data, cur_in_data + D, cur_in_data + D);
|
|
|
|
// C_t = F_t * C_t-1 + I_t * ~C_t
|
|
|
|
blas.VADD(D, cur_in_data + D, cur_in_data + D2, cur_c_out_data);
|
|
|
|
|
|
|
|
if (use_peepholes) {
|
|
|
|
// + W_oc * C_t for peephole connection
|
|
|
|
blas.VMUL(D, wc_data + D2, cur_c_out_data, checked_cell_data + D2);
|
|
|
|
blas.VADD(D, cur_in_data + D3, checked_cell_data + D2,
|
|
|
|
cur_in_data + D3);
|
|
|
|
// O_t
|
|
|
|
act_gate(D, cur_in_data + D3, cur_in_data + D3);
|
|
|
|
}
|
|
|
|
|
|
|
|
// hidden out= act_state(cellout) * outgate
|
|
|
|
act_cell(D, cur_c_out_data, cur_in_data + D2);
|
|
|
|
// H_t = O_t * act_state(C_t)
|
|
|
|
blas.VMUL(D, cur_in_data + D2, cur_in_data + D3, cur_h_out_data);
|
|
|
|
|
|
|
|
// move to next data in same batch
|
|
|
|
next_data_in_batch();
|
|
|
|
}
|
|
|
|
// move to data for next timestep
|
|
|
|
prev_batch_h_data = cur_batch_h_out_data;
|
|
|
|
prev_batch_c_data = cur_batch_c_out_data;
|
|
|
|
move_step(cur_bs);
|
|
|
|
}
|
|
|
|
|
|
|
|
math::Batch2LoDTensorFunctor<DeviceContext, T> to_seq;
|
|
|
|
batched_h_out->set_lod(batched_lod);
|
|
|
|
to_seq(dev_ctx, *batched_h_out, hidden_out);
|
|
|
|
batched_c_out->set_lod(batched_lod);
|
|
|
|
to_seq(dev_ctx, *batched_c_out, cell_out);
|
|
|
|
}
|
|
|
|
|
|
|
|
void Compute(const framework::ExecutionContext& ctx) const override {
|
|
|
|
if (ctx.Attr<bool>("use_seq")) {
|
|
|
|
SeqCompute(ctx);
|
|
|
|
} else {
|
|
|
|
BatchCompute(ctx);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#undef INIT_BASE_SIZES
|
|
|
|
#undef INIT_BASE_INPUT_OUTPUT
|
|
|
|
#undef INIT_VEC_FUNC
|
|
|
|
};
|
|
|
|
|
|
|
|
} // namespace operators
|
|
|
|
} // namespace paddle
|
|
|
|
|
|
|
|
namespace ops = paddle::operators;
|
|
|
|
REGISTER_OPERATOR(fusion_lstm, ops::FusionLSTMOp, ops::FusionLSTMOpMaker,
|
|
|
|
paddle::framework::DefaultGradOpDescMaker<true>);
|
|
|
|
|
|
|
|
REGISTER_OP_CPU_KERNEL(fusion_lstm, ops::FuisonLSTMKernel<float>,
|
|
|
|
ops::FuisonLSTMKernel<double>);
|