Qiao Longfei
7 years ago
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GitHub
commit
7c426be98c
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/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/operators/merge_ids_op.h"
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namespace paddle {
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namespace operators {
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class MergeIdsOpMaker : public framework::OpProtoAndCheckerMaker {
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public:
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void Make() override {
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AddInput("Ids", "(LoDTensor) the input ids with shape{batch_num, 1}");
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AddInput(
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"X",
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"(LoDTensors) multi input tensor with shape{batch_num, N}, N is the "
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"size of embedding table")
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.AsDuplicable();
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AddOutput("Out", "(LoDTensor) The merged outputs of the input tensors.");
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AddComment(R"DOC(
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Merge multi LoDTensor's into one according to Ids's shard num.
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split_ids_op -> prefetch_op -> merge_ids_op
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merge_ids_op should be used after split_ids_op and prefetch_op, split_ids_op
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will split input Ids into multiple tensors according to Id's shard number.
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prefetch_op will send them to parameter server to prefetch embedding value
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back. During split, the order of ids is disordered. In merge_ids_op we use
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the original Ids to restore the order of the fetched embedding value and
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also pass the lod information to the merged output.
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Example:
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Ids = [1,2,3,4,5,6] # 3 shared
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split_ids_op ->
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Id0 = [3, 6] # id % 3 == 0
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Id1 = [1, 4] # id % 3 == 1
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Id2 = [2, 5] # id % 3 == 2
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prefetch_op ->
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X0 = [[0.3 0.3] # 3
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[0.6 0.6]] # 6
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X1 = [[0.1 0.1] # 1
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[0.4 0.4]] # 4
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X2 = [[0.2 0.2] # 2
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[0.5 0.5]] # 5
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merge_ids_op ->
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Out = [[0.1 0.1] # 1
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[0.2 0.2] # 2
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[0.3 0.3] # 3
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[0.4 0.4] # 4
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[0.5 0.5] # 5
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[0.6 0.6]] # 6
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)DOC");
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}
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};
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class MergeIdsOp : public framework::OperatorWithKernel {
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public:
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using framework::OperatorWithKernel::OperatorWithKernel;
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void InferShape(framework::InferShapeContext *ctx) const override {
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PADDLE_ENFORCE(ctx->HasInput("Ids"), "MergeIdsOp must has input Ids.");
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PADDLE_ENFORCE(ctx->HasInputs("X"), "MergeIdsOp must has input X.");
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PADDLE_ENFORCE(ctx->HasOutput("Out"), "MergeIdsOp must has output Out.");
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auto ids_var_type = ctx->GetInputsVarType("Ids").front();
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auto ids_dims = ctx->GetInputDim("Ids");
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if (ids_var_type == framework::proto::VarType::LOD_TENSOR) {
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PADDLE_ENFORCE_EQ(ids_dims.size(), 2);
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PADDLE_ENFORCE_EQ(ids_dims[1], 1);
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}
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auto x_var_type = ctx->GetInputsVarType("X");
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for (auto &var_type : x_var_type) {
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PADDLE_ENFORCE_EQ(var_type, framework::proto::VarType::LOD_TENSOR,
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"input X only support lod tensors");
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}
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ctx->ShareLoD("Ids", "Out");
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}
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private:
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framework::OpKernelType GetExpectedKernelType(
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const framework::ExecutionContext &ctx) const override {
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return framework::OpKernelType(
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framework::ToDataType(
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ctx.MultiInput<framework::Tensor>("X").front()->type()),
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ctx.GetPlace());
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}
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};
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class MergeIdsOpInferVarType : public framework::VarTypeInference {
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public:
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void operator()(const framework::OpDesc &op_desc,
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framework::BlockDesc *block) const override {
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auto *input_var = block->Var(op_desc.Input("Ids")[0]);
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for (auto &out_var : op_desc.Output("Out")) {
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block->Var(out_var)->SetType(input_var->GetType());
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}
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}
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};
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} // namespace operators
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} // namespace paddle
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namespace ops = paddle::operators;
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REGISTER_OPERATOR(merge_ids, ops::MergeIdsOp, ops::MergeIdsOpMaker,
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ops::MergeIdsOpInferVarType);
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REGISTER_OP_CPU_KERNEL(
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merge_ids, ops::MergeIdsOpKernel<paddle::platform::CPUPlace, float>);
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@ -0,0 +1,92 @@
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/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#pragma once
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#include <vector>
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/framework/tensor_util.h"
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#include "paddle/fluid/operators/math/selected_rows_functor.h"
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namespace paddle {
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namespace operators {
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template <typename DeviceContext, typename T>
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class MergeIdsOpKernel : public framework::OpKernel<T> {
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public:
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void Compute(const framework::ExecutionContext &ctx) const override {
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auto place = ctx.GetPlace();
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if (!platform::is_cpu_place(place)) {
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PADDLE_THROW("MergeIds do not support GPU kernel");
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}
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VLOG(3) << "run in MergeIdsOpKernel";
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const auto *ids_var = ctx.InputVar("Ids");
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PADDLE_ENFORCE(ids_var->IsType<framework::LoDTensor>(),
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"only support to merge Ids of LoDTensor");
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const auto &ids_tensor = ids_var->Get<framework::LoDTensor>();
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const auto &ids_dims = ids_tensor.dims();
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const int64_t *ids = ids_tensor.data<int64_t>();
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auto x_tensors = ctx.MultiInput<framework::LoDTensor>("X");
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auto *out = ctx.Output<framework::LoDTensor>("Out");
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int batch_size = 0;
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int embedding_size = 0;
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for (auto &input : x_tensors) {
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if (framework::product(input->dims()) != 0) {
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if (embedding_size == 0) {
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embedding_size = input->dims()[1];
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}
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PADDLE_ENFORCE_EQ(embedding_size, input->dims()[1],
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"embedding size of all input should be the same");
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batch_size += input->dims()[0];
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}
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}
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PADDLE_ENFORCE_EQ(
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batch_size, ids_dims[0],
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"the batch size of ids and merged embedding value should be the same");
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const size_t shard_num = x_tensors.size();
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if (shard_num == 1) {
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VLOG(3) << "only one shard, we can copy the data directly";
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TensorCopy(*x_tensors[0], place, out);
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} else {
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std::vector<int> in_indexs(shard_num, 0);
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auto *out_data = out->mutable_data<T>(
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framework::make_ddim({batch_size, embedding_size}), place);
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// copy data from ins[shard_num] to out.
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for (int i = 0; i < ids_dims[0]; ++i) {
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int64_t id = ids[i];
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size_t shard_id = static_cast<size_t>(id) % shard_num;
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int index = in_indexs[shard_id];
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memcpy(out_data + embedding_size * i,
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x_tensors[shard_id]->data<T>() + index * embedding_size,
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sizeof(T) * embedding_size);
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in_indexs[shard_id] += 1;
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}
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for (size_t i = 0; i < shard_num; ++i) {
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PADDLE_ENFORCE_EQ(in_indexs[i], x_tensors[i]->dims()[0],
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"after merge, all data in x_tensor should be used");
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}
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}
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}
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};
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} // namespace operators
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} // namespace paddle
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@ -0,0 +1,38 @@
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# Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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import unittest
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import numpy as np
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from op_test import OpTest
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class TestMergeIdsOp(OpTest):
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def setUp(self):
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self.op_type = "merge_ids"
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ids = np.array([[0], [2], [2], [3], [5], [5], [6]]).astype('int64')
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x0 = np.array([[0.1, 0.2], [0.2, 0.3], [0.3, 0.4]]).astype('float32')
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x1 = np.array([]).astype('float32')
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x2 = np.array([[0.4, 0.5], [0.4, 0.5], [0.5, 0.6],
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[0.5, 0.6]]).astype('float32')
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out = np.array([[0.1, 0.2], [0.4, 0.5], [0.4, 0.5], [0.2, 0.3],
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[0.5, 0.6], [0.5, 0.6], [0.3, 0.4]]).astype('float32')
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self.inputs = {'Ids': ids, "X": [('x0', x0), ('x1', x1), ('x2', x2)]}
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self.outputs = {'Out': out}
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def test_check_output(self):
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self.check_output()
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if __name__ == '__main__':
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unittest.main()
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