post deconv assembly for arm32

mindspore/lite/nnacl/fp32/common_func.c

@@ -42,7 +42,7 @@ void PostConvFuncComm(const float *src_ptr_, float *out_ptr, const float *bias_p
 
 void PostConvFuncFp32C8(const float *c8_out_ptr, float *out_ptr, const float *bias_ptr, size_t output_channel,
                         size_t plane_size, size_t stride, bool is_relu, bool is_relu6) {
-#ifndef ENABLE_ARM64
+#ifndef ENABLE_ARM
   PostConvFuncComm(c8_out_ptr, out_ptr, bias_ptr, output_channel, plane_size, stride, is_relu, is_relu6, C8NUM);
 #else
   size_t oc8mod = output_channel % C8NUM;

mindspore/lite/nnacl/fp32/common_func.h

@@ -45,6 +45,8 @@ void ConvDwFp32Row(float *output_ptr, const float *input_ptr, const float *weigh
 
 void ConvDwFp32Border(float *dst, const float *src, const float *weight, const float *bias, size_t height, size_t width,
                       size_t in_kh_step, size_t in_kw_step, size_t kernel_w, size_t relu, size_t relu6);
+void PostFuncBiasReluC8(float *dst, const float *src, const float *bias, size_t oc8div, size_t oc8mod,
+                        size_t plane_size, size_t stride, size_t relu_type);
 #endif
 
 #ifdef ENABLE_ARM64
@@ -57,9 +59,6 @@ void Relu(float *data, size_t element4);
 void DeconvDwFp32Border(float *dst, const float *src, const float *weight, size_t height, size_t width,
                         size_t in_kh_step, size_t in_kw_step, size_t kernel_w);
 
-void PostFuncBiasReluC8(float *dst, const float *src, const float *bias, size_t oc8div, size_t oc8mod,
-                        size_t plane_size, size_t stride, size_t relu_type);
-
 void ConvSwFp32Center(float *dst, const float *src, const float *weight, const float *bias, size_t height, size_t width,
                       size_t kernel_h, size_t kernel_w, size_t out_h_step, size_t block_channel, size_t ic4,
                       size_t in_sh_step, size_t in_sw_step, size_t in_kh_step, size_t in_kw_step, size_t relu,