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fix codex for gpu conv2d

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pull/677/head
VectorSL 5 years ago
parent eefb6edde2
commit fe9008f73c
3 changed files with 51 additions and 44 deletions
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36
mindspore/ccsrc/kernel/gpu/nn/conv2d_gpu_kernel.h
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@ -114,23 +114,7 @@ class Conv2dGpuFwdKernel : public GpuKernel {
pad_height_ = GetAttr<int>(kernel_node, "pad"); pad_height_ = GetAttr<int>(kernel_node, "pad");
pad_width_ = pad_height_; pad_width_ = pad_height_;
pad_mode_ = GetAttr<std::string>(kernel_node, "pad_mode"); pad_mode_ = GetAttr<std::string>(kernel_node, "pad_mode");
auto stride_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "stride"); SetStrideAndDilation(kernel_node);
auto dilation_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "dilation");
if (stride_ori.size() != 4 || stride_ori[2] != stride_ori[3]) {
MS_LOG(EXCEPTION) << "conv2d only support equal stride, and stride must be 4d!";
}
if (stride_ori[0] != 1 || stride_ori[1] != 1) {
MS_LOG(EXCEPTION) << "conv2d stride only support 1 in N axis and C axis!";
}
if (dilation_ori.size() != 4 || dilation_ori[2] != dilation_ori[3]) {
MS_LOG(EXCEPTION) << "conv2d only support equal dilation, and dilation must be 4d!";
}
if (dilation_ori[0] != 1 || dilation_ori[1] != 1) {
MS_LOG(EXCEPTION) << "conv2d dilation only support 1 in N axis and C axis!";
}
stride_ = stride_ori[2];
dilation_ = dilation_ori[2];
cudnnTensorDescriptor_t input_descriptor_real = nullptr; cudnnTensorDescriptor_t input_descriptor_real = nullptr;
if (pad_mode_ == kSamePadModeUpperCase || pad_mode_ == kSamePadModeLowerCase) { if (pad_mode_ == kSamePadModeUpperCase || pad_mode_ == kSamePadModeLowerCase) {
SetPad(in_shape, kernel_node); SetPad(in_shape, kernel_node);
@ -277,6 +261,24 @@ class Conv2dGpuFwdKernel : public GpuKernel {
conv_algorithm_ = perf_results.algo; conv_algorithm_ = perf_results.algo;
} }
} }
void SetStrideAndDilation(const CNodePtr &kernel_node) {
auto stride_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "stride");
auto dilation_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "dilation");
if (stride_ori.size() != 4 || stride_ori[2] != stride_ori[3]) {
MS_LOG(EXCEPTION) << "conv2d only support equal stride, and stride must be 4d!";
}
if (stride_ori[0] != 1 || stride_ori[1] != 1) {
MS_LOG(EXCEPTION) << "conv2d stride only support 1 in N axis and C axis!";
}
if (dilation_ori.size() != 4 || dilation_ori[2] != dilation_ori[3]) {
MS_LOG(EXCEPTION) << "conv2d only support equal dilation, and dilation must be 4d!";
}
if (dilation_ori[0] != 1 || dilation_ori[1] != 1) {
MS_LOG(EXCEPTION) << "conv2d dilation only support 1 in N axis and C axis!";
}
stride_ = stride_ori[2];
dilation_ = dilation_ori[2];
}
cudnnHandle_t cudnn_handle_; cudnnHandle_t cudnn_handle_;
cudnnTensorDescriptor_t input_desc_; cudnnTensorDescriptor_t input_desc_;
cudnnTensorDescriptor_t output_desc_; cudnnTensorDescriptor_t output_desc_;

30
mindspore/ccsrc/kernel/gpu/nn/conv2d_grad_filter_gpu_kernel.h
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@ -117,19 +117,7 @@ class ConvGradFilterGpuBkwKernel : public GpuKernel {
pad_height_ = GetAttr<int>(kernel_node, "pad"); pad_height_ = GetAttr<int>(kernel_node, "pad");
pad_width_ = pad_height_; pad_width_ = pad_height_;
pad_mode_ = GetAttr<std::string>(kernel_node, "pad_mode"); pad_mode_ = GetAttr<std::string>(kernel_node, "pad_mode");
auto stride_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "stride"); SetStrideAndDilation(kernel_node);
auto dilation_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "dilation");
if (stride_ori.size() != 2 || stride_ori[0] != stride_ori[1]) {
MS_LOG(EXCEPTION) << "ConvGradFilterGpuBkwKernel only support equal stride, and stride must be 2d!";
}
if (dilation_ori.size() != 4 || dilation_ori[2] != dilation_ori[3]) {
MS_LOG(EXCEPTION) << "ConvGradFilterGpuBkwKernel only support equal dilation, and dilation must be 4d!";
}
if (dilation_ori[0] != 1 || dilation_ori[1] != 1) {
MS_LOG(EXCEPTION) << "ConvGradFilterGpuBkwKernel dilation only support 1 in N axis and C axis!";
}
stride_ = stride_ori[0];
dilation_ = dilation_ori[2];
cudnnTensorDescriptor_t x_desc_real = nullptr; cudnnTensorDescriptor_t x_desc_real = nullptr;
if (pad_mode_ == kSamePadModeUpperCase || pad_mode_ == kSamePadModeLowerCase) { if (pad_mode_ == kSamePadModeUpperCase || pad_mode_ == kSamePadModeLowerCase) {
SetPad(in_shape, kernel_node); SetPad(in_shape, kernel_node);
@ -281,7 +269,21 @@ class ConvGradFilterGpuBkwKernel : public GpuKernel {
SizeToInt(in_shape[1]), SizeToInt(in_shape[2]), SizeToInt(in_shape[3])), SizeToInt(in_shape[1]), SizeToInt(in_shape[2]), SizeToInt(in_shape[3])),
"SetTensor4dDescriptor failed"); "SetTensor4dDescriptor failed");
} }
void SetStrideAndDilation(const CNodePtr &kernel_node) {
auto stride_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "stride");
auto dilation_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "dilation");
if (stride_ori.size() != 2 || stride_ori[0] != stride_ori[1]) {
MS_LOG(EXCEPTION) << "ConvGradFilterGpuBkwKernel only support equal stride, and stride must be 2d!";
}
if (dilation_ori.size() != 4 || dilation_ori[2] != dilation_ori[3]) {
MS_LOG(EXCEPTION) << "ConvGradFilterGpuBkwKernel only support equal dilation, and dilation must be 4d!";
}
if (dilation_ori[0] != 1 || dilation_ori[1] != 1) {
MS_LOG(EXCEPTION) << "ConvGradFilterGpuBkwKernel dilation only support 1 in N axis and C axis!";
}
stride_ = stride_ori[0];
dilation_ = dilation_ori[2];
}
cudnnHandle_t cudnn_handle_; cudnnHandle_t cudnn_handle_;
cudnnFilterDescriptor_t dw_desc_; cudnnFilterDescriptor_t dw_desc_;
cudnnConvolutionDescriptor_t conv_desc_; cudnnConvolutionDescriptor_t conv_desc_;

29
mindspore/ccsrc/kernel/gpu/nn/conv2d_grad_input_gpu_kernel.h
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@ -118,19 +118,7 @@ class ConvGradInputGpuBkwKernel : public GpuKernel {
pad_height_ = GetAttr<int>(kernel_node, "pad"); pad_height_ = GetAttr<int>(kernel_node, "pad");
pad_width_ = pad_height_; pad_width_ = pad_height_;
pad_mode_ = GetAttr<std::string>(kernel_node, "pad_mode"); pad_mode_ = GetAttr<std::string>(kernel_node, "pad_mode");
auto stride_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "stride"); SetStrideAndDilation(kernel_node);
auto dilation_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "dilation");
if (stride_ori.size() != 2 || stride_ori[0] != stride_ori[1]) {
MS_LOG(EXCEPTION) << "ConvGradInputGpuBkwKernel only support equal stride, and stride must be 2d!";
}
if (dilation_ori.size() != 4 || dilation_ori[2] != dilation_ori[3]) {
MS_LOG(EXCEPTION) << "ConvGradInputGpuBkwKernel only support equal dilation, and dilation must be 4d!";
}
if (dilation_ori[0] != 1 || dilation_ori[1] != 1) {
MS_LOG(EXCEPTION) << "ConvGradInputGpuBkwKernel dilation only support 1 in N axis and C axis!";
}
stride_ = stride_ori[0];
dilation_ = dilation_ori[2];
cudnnTensorDescriptor_t dx_desc_real = nullptr; cudnnTensorDescriptor_t dx_desc_real = nullptr;
if (pad_mode_ == kSamePadModeUpperCase || pad_mode_ == kSamePadModeLowerCase) { if (pad_mode_ == kSamePadModeUpperCase || pad_mode_ == kSamePadModeLowerCase) {
SetPad(input_shape, kernel_node); SetPad(input_shape, kernel_node);
@ -279,6 +267,21 @@ class ConvGradInputGpuBkwKernel : public GpuKernel {
input_shape[2], input_shape[3]), input_shape[2], input_shape[3]),
"SetTensor4dDescriptor failed"); "SetTensor4dDescriptor failed");
} }
void SetStrideAndDilation(const CNodePtr &kernel_node) {
auto stride_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "stride");
auto dilation_ori = AnfAlgo::GetNodeAttr<std::vector<int>>(kernel_node, "dilation");
if (stride_ori.size() != 2 || stride_ori[0] != stride_ori[1]) {
MS_LOG(EXCEPTION) << "ConvGradInputGpuBkwKernel only support equal stride, and stride must be 2d!";
}
if (dilation_ori.size() != 4 || dilation_ori[2] != dilation_ori[3]) {
MS_LOG(EXCEPTION) << "ConvGradInputGpuBkwKernel only support equal dilation, and dilation must be 4d!";
}
if (dilation_ori[0] != 1 || dilation_ori[1] != 1) {
MS_LOG(EXCEPTION) << "ConvGradInputGpuBkwKernel dilation only support 1 in N axis and C axis!";
}
stride_ = stride_ori[0];
dilation_ = dilation_ori[2];
}
cudnnHandle_t cudnn_handle_; cudnnHandle_t cudnn_handle_;
cudnnFilterDescriptor_t w_desc_; cudnnFilterDescriptor_t w_desc_;
cudnnConvolutionDescriptor_t conv_desc_; cudnnConvolutionDescriptor_t conv_desc_;

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