11 Commits (c44fb003715aab90d14f0d0fce020d0b65ec6fbf)

Author	SHA1	Message	Date
tensor-tang	742300baa8	fix unkown omp pragmas	7 years ago
tensor-tang	4b5986bb77	enable fc op in normal case	7 years ago
tensor-tang	e133df6037	enable native fc forward	7 years ago
tensor-tang	038cbf799d	add bias for fc op	7 years ago
mozga-intel	3ff9ba0e6b	Mkldnn layout (#11040) ... * Add MKLDNN layout support in Paddle Add MKLDNN layout in Paddle so that MKLDNN friendly memory layout can be used in MKLDNN enabled OP kernel. Before this commit, NCHW is hardcode to be used in all MKLDNN op kernels. As a result, non-optimized execution path is selected in MKLDNN primitive which bring worse performance. Besides framework change, three MKLDNN OP kernels were updated for using new MKLDNN layout. They are conv/pool2d/batch_norm. Other MKLDNN OP kernels need be also updated in similar way to achieve best performance. * Add MKLDNN layout support in activation OP * Don't populate layout from input to output when kMKLDNN in * Refine pool mkldnn op kernel * MKLDNN layout * Remove the inferitance from tensor file * MKLDNN layout: refactoring * Remove additional #define to register new operator * Prepare mkldnn tests to work with layout	7 years ago
Yu Yang	0e78cb69fb	Clean OpProtoAndCheckerMaker ... Do not use ctor * Reduce line of codes. * We can use virtual function for Maker now. * The implementation does not care what maker holds, it is easier to refactor later.	7 years ago
Yang Yang(Tony)	e04c43d543	add semicolon to op registry (#10034) ... * script to add semicolon * fix typo	7 years ago
Yang Yang	ce7c2e86e5	script to fix all	7 years ago
mozga-intel	46e14bbcbb	Enforce: 2 and 4 dims, remove information about out in format	7 years ago
mozga-intel	32f8ac7d3b	Remove additional message	7 years ago
mozga-intel	34a8084328	Added new fc files, register fc kernel	7 years ago